Re: [PATCH][next] net/mlx5: Fix bit-wise and with zero

From: Laurence Oberman
Date: Tue Apr 06 2021 - 17:13:44 EST


On Tue, 2021-04-06 at 17:53 +0100, Colin King wrote:
> From: Colin Ian King <colin.king@xxxxxxxxxxxxx>
>
> The bit-wise and of the action field with
> MLX5_ACCEL_ESP_ACTION_DECRYPT
> is incorrect as MLX5_ACCEL_ESP_ACTION_DECRYPT is zero and not
> intended
> to be a bit-flag. Fix this by using the == operator as was originally
> intended.
>
> Addresses-Coverity: ("Logically dead code")
> Fixes: 7dfee4b1d79e ("net/mlx5: IPsec, Refactor SA handle creation
> and destruction")
> Signed-off-by: Colin Ian King <colin.king@xxxxxxxxxxxxx>
> ---
> drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c
> b/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c
> index d43a05e77f67..0b19293cdd74 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c
> @@ -850,7 +850,7 @@ mlx5_fpga_ipsec_release_sa_ctx(struct
> mlx5_fpga_ipsec_sa_ctx *sa_ctx)
> return;
> }
>
> - if (sa_ctx->fpga_xfrm->accel_xfrm.attrs.action &
> + if (sa_ctx->fpga_xfrm->accel_xfrm.attrs.action ==
> MLX5_ACCEL_ESP_ACTION_DECRYPT)
> ida_free(&fipsec->halloc, sa_ctx->sa_handle);
>

Looks correct to me with enum mlx5_accel_esp_action action;

Reviewed-by Laurence Oberman <loberman@xxxxxxxxxx>