Re: [PATCH v2 0/6] NVIDIA Tegra memory improvements

[Dmitry Osipenko]

01.04.2021 20:54, Krzysztof Kozlowski пишет:
> On 31/03/2021 01:04, Dmitry Osipenko wrote:
>> Hi,
>>
>> This series replaces the raw voltage regulator with a power domain that
>> will be managing SoC core voltage. The core power domain patches are still
>> under review, but it's clear at this point that this is the way we will
>> implement the DVFS support.
>>
>> The remaining Tegra20 memory bindings are converted to schema. I also
>> made a small improvement to the memory drivers.
>>
>> Changelog:
>>
>> v2: - Fixed typos in the converted schemas.
>>     - Corrected reg entry of tegra20-mc-gart schema to use fixed number of items.
>>     - Made power-domain to use maxItems instead of $ref phandle in schemas.
>>
>> Dmitry Osipenko (6):
>>   dt-bindings: memory: tegra20: emc: Replace core regulator with power
>>     domain
>>   dt-bindings: memory: tegra30: emc: Replace core regulator with power
>>     domain
>>   dt-bindings: memory: tegra124: emc: Replace core regulator with power
>>     domain
>>   dt-bindings: memory: tegra20: mc: Convert to schema
>>   dt-bindings: memory: tegra20: emc: Convert to schema
>>   memory: tegra: Print out info-level once per driver probe
> 
> Thanks, applied subset - 1-4 and 6. For patch 5/6 I expect v3.

I'll make a v3, thank you.