RE: [PATCH v10 2/2] Documentation: fpga: dfl: Add description for DFL UIO support

[Wu, Hao]

> Subject: [PATCH v10 2/2] Documentation: fpga: dfl: Add description for DFL UIO
> support
> 
> This patch adds description for UIO support for dfl devices on DFL
> bus.
> 
> Signed-off-by: Xu Yilun <yilun.xu@xxxxxxxxx>
> Reviewed-by: Tom Rix <trix@xxxxxxxxxx>
> ---
> v2: no doc in v1, add it for v2.
> v3: some documentation fixes.
> v4: documentation change since the driver matching is changed.
> v5: no change.
> v6: improve the title of the userspace driver support section.
>     some word improvement.
> v7: rebased to next-20210119
> v8: some doc fixes.
> v9: some doc change since we switch to the driver in drivers/uio.
> v10: no change.
> ---
>  Documentation/fpga/dfl.rst | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
> index c41ac76..e35cf87 100644
> --- a/Documentation/fpga/dfl.rst
> +++ b/Documentation/fpga/dfl.rst
> @@ -7,6 +7,7 @@ Authors:
>  - Enno Luebbers <enno.luebbers@xxxxxxxxx>
>  - Xiao Guangrong <guangrong.xiao@xxxxxxxxxxxxxxx>
>  - Wu Hao <hao.wu@xxxxxxxxx>
> +- Xu Yilun <yilun.xu@xxxxxxxxx>
> 
>  The Device Feature List (DFL) FPGA framework (and drivers according to
>  this framework) hides the very details of low layer hardwares and provides
> @@ -530,6 +531,28 @@ Being able to specify more than one DFL per BAR has
> been considered, but it
>  was determined the use case did not provide value.  Specifying a single DFL
>  per BAR simplifies the implementation and allows for extra error checking.
> 
> +
> +Userspace driver support for DFL devices
> +========================================
> +The purpose of an FPGA is to be reprogrammed with newly developed
> hardware
> +components. New hardware can instantiate a new private feature in the DFL,
> and
> +then present a DFL device in the system. In some cases users may need a
> +userspace driver for the DFL device:
> +
> +* Users may need to run some diagnostic test for their hardware.
> +* Users may prototype the kernel driver in user space.
> +* Some hardware is designed for specific purposes and does not fit into one of
> +  the standard kernel subsystems.
> +
> +This requires direct access to MMIO space and interrupt handling from
> +userspace. The uio_dfl module exposes the UIO device interfaces for this
> +purpose.

Current uio_dfl doesn't have interrupt handling support, right? I guess we need
to make sure no confusion on the description here. other place looks good to me.

Hao

> +
> +UIO_DFL should be selected to enable the uio_dfl module driver. To support a
> +new DFL feature via UIO direct access, its feature id should be added to the
> +driver's id_table.
> +
> +
>  Open discussion
>  ===============
>  FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial
> reconfiguration
> --
> 2.7.4