Re: [PATCH v2 1/2] clk: tegra30: Add hda clock default rates to clock driver

[Sameer Pujar]

On 1/8/2021 7:29 PM, Peter Geis wrote:
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>
>
> Current implementation defaults the hda clocks to clk_m. This causes hda
> to run too slow to operate correctly. Fix this by defaulting to pll_p and
> setting the frequency to the correct rate.
>
> This matches upstream t124 and downstream t30.
>
> Acked-by: Jon Hunter <jonathanh@xxxxxxxxxx>
> Tested-by: Ion Agorria <ion@xxxxxxxxxxx>
> Signed-off-by: Peter Geis <pgwipeout@xxxxxxxxx>
> ---
>   drivers/clk/tegra/clk-tegra30.c | 2 ++
>   1 file changed, 2 insertions(+)

Acked-by: Sameer Pujar <spujar@xxxxxxxxxx>