Re: Interrupts enabled after amd_iommu_resume+0x0/0x40

From: David Woodhouse
Date: Mon Jan 04 2021 - 18:40:41 EST


On Tue, 2021-01-05 at 00:23 +0100, Borislav Petkov wrote:
> On Mon, Jan 04, 2021 at 02:22:50PM +0100, Borislav Petkov wrote:
> > Hi folks,
> >
> > syscore_resume() doesn't like when the AMD iommu driver enables
> > interrupts in its ->resume hook when I resume the box from suspend to
> > RAM.
> >
> > All kinds of warnings get triggered too:
> >
> > [ 17.386830] WARNING: CPU: 0 PID: 2 at kernel/time/timekeeping.c:824 ktime_get+0x8d/0xa0
> > [ 17.386830] WARNING: CPU: 0 PID: 2 at kernel/time/timekeeping.c:867 ktime_get_with_offset+0xda/0xf0
> > [ 17.386830] WARNING: CPU: 0 PID: 2 at kernel/time/timekeeping.c:824 ktime_get+0x8d/0xa0
> > [ 17.386830] WARNING: CPU: 0 PID: 2 at kernel/time/timekeeping.c:867 ktime_get_with_offset+0xda/0xf0
> > [ 17.386830] WARNING: CPU: 0 PID: 1576 at drivers/base/syscore.c:103 syscore_resume+0x12d/0x160
> >
> > but when I comment out the
> >
> > amd_iommu_enable_interrupts()
> >
> > call in the resume hook, all is fine and quiet and box resumes.
> >
> > I'll try to bisect later to try to pinpoint it better because I don't
> > see what recent change would've caused this. But someone might have a
> > better idea so CC the usual suspects.
>
> Ok, bisected to:
>
> # first bad commit: [d1adcfbb520c43c10fc22fcdccdd4204e014fb53] iommu/amd: Fix IOMMU interrupt generation in X2APIC mode
>
> That patch reverts cleanly ontop of -rc2 and with it reverted, the
> machine resumes fine.

diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index f54cd79b43e4..6a1f7048dacc 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -1973,8 +1973,6 @@ static int iommu_setup_msi(struct amd_iommu *iommu)
return r;
}

- iommu->int_enabled = true;
-
return 0;
}

@@ -2169,6 +2167,7 @@ static int iommu_init_irq(struct amd_iommu *iommu)
if (ret)
return ret;

+ iommu->int_enabled = true;
enable_faults:
iommu_feature_enable(iommu, CONTROL_EVT_INT_EN);



?

Attachment: smime.p7s
Description: S/MIME cryptographic signature