Re: [PATCH 2/3] arm64: dts: qcom: sm8150: Add PSCI idle states

[Bjorn Andersson]

On Sun 20 Dec 16:29 PST 2020, Danny Lin wrote:

> Like other Qualcomm SoCs, sm8150 exposes CPU and cluster idle states
> through PSCI. Define the idle states to save power when the CPU is not
> in active use.
> 
> These idle states, latency, and residency values match the downstream
> 4.14 kernel from Qualcomm as of LA.UM.8.1.r1-15600-sm8150.0.
> 
> It's worth noting that the CPU has an additional C3 power collapse idle
> state between WFI and rail power collapse (with PSCI mode 0x40000003),
> but it is not officially used in downstream kernels due to "thermal
> throttling issues."
> 

Thanks Danny for this series, very happy to see this kind of additions.
Just one small question about the cluster param below.

> Signed-off-by: Danny Lin <danny@xxxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 50 ++++++++++++++++++++++++++++
>  1 file changed, 50 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 75ed38ee5d88..edc1fe6d7f1b 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -50,6 +50,8 @@ CPU0: cpu@0 {
>  			compatible = "qcom,kryo485";
>  			reg = <0x0 0x0>;
>  			enable-method = "psci";
> +			cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> +					   &CLUSTER_SLEEP_0>;
>  			next-level-cache = <&L2_0>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			#cooling-cells = <2>;
> @@ -67,6 +69,8 @@ CPU1: cpu@100 {
>  			compatible = "qcom,kryo485";
>  			reg = <0x0 0x100>;
>  			enable-method = "psci";
> +			cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> +					   &CLUSTER_SLEEP_0>;
>  			next-level-cache = <&L2_100>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			#cooling-cells = <2>;
> @@ -82,6 +86,8 @@ CPU2: cpu@200 {
>  			compatible = "qcom,kryo485";
>  			reg = <0x0 0x200>;
>  			enable-method = "psci";
> +			cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> +					   &CLUSTER_SLEEP_0>;
>  			next-level-cache = <&L2_200>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			#cooling-cells = <2>;
> @@ -96,6 +102,8 @@ CPU3: cpu@300 {
>  			compatible = "qcom,kryo485";
>  			reg = <0x0 0x300>;
>  			enable-method = "psci";
> +			cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> +					   &CLUSTER_SLEEP_0>;
>  			next-level-cache = <&L2_300>;
>  			qcom,freq-domain = <&cpufreq_hw 0>;
>  			#cooling-cells = <2>;
> @@ -110,6 +118,8 @@ CPU4: cpu@400 {
>  			compatible = "qcom,kryo485";
>  			reg = <0x0 0x400>;
>  			enable-method = "psci";
> +			cpu-idle-states = <&BIG_CPU_SLEEP_0
> +					   &CLUSTER_SLEEP_0>;
>  			next-level-cache = <&L2_400>;
>  			qcom,freq-domain = <&cpufreq_hw 1>;
>  			#cooling-cells = <2>;
> @@ -124,6 +134,8 @@ CPU5: cpu@500 {
>  			compatible = "qcom,kryo485";
>  			reg = <0x0 0x500>;
>  			enable-method = "psci";
> +			cpu-idle-states = <&BIG_CPU_SLEEP_0
> +					   &CLUSTER_SLEEP_0>;
>  			next-level-cache = <&L2_500>;
>  			qcom,freq-domain = <&cpufreq_hw 1>;
>  			#cooling-cells = <2>;
> @@ -138,6 +150,8 @@ CPU6: cpu@600 {
>  			compatible = "qcom,kryo485";
>  			reg = <0x0 0x600>;
>  			enable-method = "psci";
> +			cpu-idle-states = <&BIG_CPU_SLEEP_0
> +					   &CLUSTER_SLEEP_0>;
>  			next-level-cache = <&L2_600>;
>  			qcom,freq-domain = <&cpufreq_hw 1>;
>  			#cooling-cells = <2>;
> @@ -152,6 +166,8 @@ CPU7: cpu@700 {
>  			compatible = "qcom,kryo485";
>  			reg = <0x0 0x700>;
>  			enable-method = "psci";
> +			cpu-idle-states = <&BIG_CPU_SLEEP_0
> +					   &CLUSTER_SLEEP_0>;
>  			next-level-cache = <&L2_700>;
>  			qcom,freq-domain = <&cpufreq_hw 2>;
>  			#cooling-cells = <2>;
> @@ -196,6 +212,40 @@ core7 {
>  				};
>  			};
>  		};
> +
> +		idle-states {
> +			entry-method = "psci";
> +
> +			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
> +				compatible = "arm,idle-state";
> +				idle-state-name = "little-rail-power-collapse";
> +				arm,psci-suspend-param = <0x40000004>;
> +				entry-latency-us = <355>;
> +				exit-latency-us = <909>;
> +				min-residency-us = <3934>;
> +				local-timer-stop;
> +			};
> +
> +			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
> +				compatible = "arm,idle-state";
> +				idle-state-name = "big-rail-power-collapse";
> +				arm,psci-suspend-param = <0x40000004>;
> +				entry-latency-us = <241>;
> +				exit-latency-us = <1461>;
> +				min-residency-us = <4488>;
> +				local-timer-stop;
> +			};
> +
> +			CLUSTER_SLEEP_0: cluster-sleep-0 {
> +				compatible = "arm,idle-state";
> +				idle-state-name = "cluster-power-collapse";
> +				arm,psci-suspend-param = <0x400000F4>;

How come this is 0xf4?

Isn't downstream saying that this should be either 0x1 << 4 or 0xc24 <<
4, depending on how deep we want to go? Could we at least mention why
this is 0xf4?

Regards,
Bjorn

> +				entry-latency-us = <3263>;
> +				exit-latency-us = <6562>;
> +				min-residency-us = <9987>;
> +				local-timer-stop;
> +			};
> +		};
>  	};
>  
>  	firmware {
> -- 
> 2.29.2
>