Re: [PATCH] docs/memory-barriers.txt: Fix a typo in CPU MEMORY BARRIERS section

[Paul E. McKenney]

On Fri, Sep 11, 2020 at 03:02:19PM +0100, Will Deacon wrote:
> On Wed, Sep 09, 2020 at 02:53:40PM +0800, Fox Chen wrote:
> > Commit 39323c6 smp_mb__{before,after}_atomic(): update Documentation
> > has a typo in CPU MEORY BARRIERS section:
> > "RMW functions that do not imply are memory barrier are ..." should be
> > "RMW functions that do not imply a memory barrier are ...".
> > 
> > This patch fixes this typo.
> > 
> > Signed-off-by: Fox Chen <foxhlchen@xxxxxxxxx>
> > ---
> >  Documentation/memory-barriers.txt | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
> > index 96186332e5f4..20b8a7b30320 100644
> > --- a/Documentation/memory-barriers.txt
> > +++ b/Documentation/memory-barriers.txt
> > @@ -1870,7 +1870,7 @@ There are some more advanced barrier functions:
> >  
> >       These are for use with atomic RMW functions that do not imply memory
> >       barriers, but where the code needs a memory barrier. Examples for atomic
> > -     RMW functions that do not imply are memory barrier are e.g. add,
> > +     RMW functions that do not imply a memory barrier are e.g. add,
> >       subtract, (failed) conditional operations, _relaxed functions,
> >       but not atomic_read or atomic_set. A common example where a memory
> >       barrier may be required is when atomic ops are used for reference
> 
> The document remains unreadable, but this is still worth fixing!
> 
> Acked-by: Will Deacon <will@xxxxxxxxxx>

Queued for v5.11, thank you both!

							Thanx, Paul