Re: [PATCH 2/8] arm64: cpufeature: Spell out register fields for ID_ISAR4 and ID_PFR1

[Suzuki K Poulose]

On 04/14/2020 10:31 PM, Will Deacon wrote:
> In preparation for runtime updates to the strictness of some AArch32
> features, spell out the register fields for ID_ISAR4 and ID_PFR1 to make
> things clearer to read. Note that this isn't functionally necessary, as
> the feature arrays themselves are not modified dynamically and remain
> 'const'.
>
> Signed-off-by: Will Deacon <will@xxxxxxxxxx>
> ---
>   arch/arm64/include/asm/sysreg.h | 17 +++++++++++++++++
>   arch/arm64/kernel/cpufeature.c  | 28 ++++++++++++++++++++++++++--
>   2 files changed, 43 insertions(+), 2 deletions(-)

Reviewed-by: Suzuki K Poulose <suzuki.poulose@xxxxxxx>