[PATCH v6 05/11] dt-bindings: interrupt-controller: Add Loongson-3 HTPIC

From: Jiaxun Yang
Date: Tue Mar 24 2020 - 11:40:08 EST


Document Loongson-3 HyperTransport PIC controller.

Co-developed-by: Huacai Chen <chenhc@xxxxxxxxxx>
Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
---
.../interrupt-controller/loongson,htpic.yaml | 59 +++++++++++++++++++
1 file changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml
new file mode 100644
index 000000000000..c8861cbbb8b5
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#";
+$schema: "http://devicetree.org/meta-schemas/core.yaml#";
+
+title: Loongson-3 HyperTransport Interrupt Controller
+
+maintainers:
+ - Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
+
+allOf:
+ - $ref: /schemas/interrupt-controller.yaml#
+
+description: |
+ This interrupt controller is found in the Loongson-3 family of chips to transmit
+ interrupts from PCH PIC connected on HyperTransport bus.
+
+properties:
+ compatible:
+ const: loongson,htpic-1.0
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 1
+ maxItems: 4
+ description: |
+ Four parent interrupts that receive chained interrupts.
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - '#interrupt-cells'
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ htintc: interrupt-controller@1fb000080 {
+ compatible = "loongson,htintc-1.0";
+ reg = <0xfb000080 0x40>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&liointc>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
+ <25 IRQ_TYPE_LEVEL_HIGH>,
+ <26 IRQ_TYPE_LEVEL_HIGH>,
+ <27 IRQ_TYPE_LEVEL_HIGH>;
+ };
+...
--
2.26.0.rc2