Re: [PATCH V2 6/7] arm64: dts: Add ipq6018 SoC and CP01 board support

From: Sricharan R
Date: Mon Dec 30 2019 - 04:10:17 EST


Hi Bjorn,
Thanks again for the review.

On 12/29/2019 8:59 AM, Bjorn Andersson wrote:
> On Thu 19 Dec 02:41 PST 2019, Sricharan R wrote:
>
>> Add initial device tree support for the Qualcomm IPQ6018 SoC and
>> CP01 evaluation board.
>>
>
> Hi Sricharan, thanks for the rework, this looks pretty good now, just
> some minor comments below.
>
>> Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx>
>> Signed-off-by: Sivaprakash Murugesan <sivaprak@xxxxxxxxxxxxxx>
>> Signed-off-by: Sricharan R <sricharan@xxxxxxxxxxxxxx>
>
> Should this have some Co-developed-by?
>

hmm, should be added here as well. will add it.

>> ---
>>
>> [V2] Sorted nodes based on address, name, label.
>> Removed unused clock nodes.
>> Addressed other review comments.
>>
>> arch/arm64/boot/dts/qcom/Makefile | 1 +
>> arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 41 +++++
>> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 215 +++++++++++++++++++++++++++
>> 3 files changed, 257 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
>> create mode 100644 arch/arm64/boot/dts/qcom/ipq6018.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>> index 6498a1e..2b24998 100644
>> --- a/arch/arm64/boot/dts/qcom/Makefile
>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>> @@ -1,6 +1,7 @@
>> # SPDX-License-Identifier: GPL-2.0
>> dtb-$(CONFIG_ARCH_QCOM) += apq8016-sbc.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb
>> +dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8150.dtb
>> diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
>> new file mode 100644
>> index 0000000..82a6024
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
>> @@ -0,0 +1,41 @@
>> +// SPDX-License-Identifier: GPL-2.0
>
> Please dual license as GPL+BSD
>

ok.

>> +/*
>> + * IPQ6018 CP01 board device tree source
>> + *
>> + * Copyright (c) 2019, The Linux Foundation. All rights reserved.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "ipq6018.dtsi"
>> +
>> +/ {
>> + model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";
>> + compatible = "qcom,ipq6018-cp01", "qcom,ipq6018";
>> +
>> + aliases {
>> + serial0 = &blsp1_uart3;
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial0:115200n8";
>> + bootargs-append = " swiotlb=1";
>> + };
>> +};
>> +
>> +&blsp1_uart3 {
>> + pinctrl-0 = <&uart_pins>;
>> + pinctrl-names = "default";
>> + status = "ok";
>> +};
>> +
>> +&tlmm {
>> + uart_pins: uart_pins {
>
> Reference the &uart_pins directly, and please use a more specific name.
>

ok.

>> + mux {
>
> I would suggest that you either flatten the "mux" subnode and define the
> properties directly in &uart_pins; or you split it the functional pieces
> of rx { } tx { }.

ok.

>
> And right now you're duplicating the properties between the dtsi and the
> dts, either drop one of them or define the function in the dtsi and add
> the drive-strenght and bias-pull-down here.
>

ok, understand, will fix.

>> + pins = "gpio44", "gpio45";
>> + function = "blsp2_uart";
>> + drive-strength = <8>;
>> + bias-pull-down;
>> + };
>> + };
>> +};
>> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>> new file mode 100644
>> index 0000000..269287c
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
>> @@ -0,0 +1,215 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * IPQ6018 SoC device tree source
>> + *
>> + * Copyright (c) 2019, The Linux Foundation. All rights reserved.
>> + */
>> +
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/clock/qcom,gcc-ipq6018.h>
>> +
>> +/ {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + interrupt-parent = <&intc>;
>> +
>> + reserved-memory {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + tz: tz@48500000 {
>> + reg = <0x0 0x48500000 0x0 0x00200000>;
>> + no-map;
>> + };
>> + };
>> +
>> + soc: soc {
>
> soc@0
>
> Shouldn't this be sorted after 'p'?
>

yes, will fix this as well.


Regards,
Sricharan

--
"QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation