[PATCH 0/4] Add support for SC7180 display

[Kalyan Thota]

SC7180 follows a newer architecture where in some flush controls have been re-organized to simplify programming and provide for future expandability.
Specifically:
1) The TIMING_<j> bits that control flush of INTF_<j> have been replaced with a common INTF flush bit which flushes the programming in the MDP_CTL_<id>_INTF_ACTIVE register
2) Individual flush bits for MERGE_3D, DSC and CDWN have been added which flush the programming in the MDP_CTL_<id>_MERGE_3D_ACTIVE, ... etc respectively
3) PERIPH flush bit has been added to flush DSP packets for DisplayPort

The complete datapath is described using the MDP_CTL_<id>_TOP and newly added ACTIVE registers to handle other sub blocks
such as interface (INTF) resources, PingPong buffer / Layer Mixer, Display Stream Compression (DSC) resources, writeback (WB) and 3D Merge
selections that are part of the datapath.

Kalyan Thota (4):
  dt-bindings: msm:disp: add sc7180 DPU variant
  msm:disp:dpu1: add support for display for SC7180 target
  msm:disp:dpu1: setup display datapath for SC7180 target
  msm:disp:dpu1: add mixer selection for display topology

 .../devicetree/bindings/display/msm/dpu.txt        |   4 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c        |  21 ++-
 .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c   |  21 ++-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c     | 191 +++++++++++++++++++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h     |   6 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c         |  84 ++++++++-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h         |  24 +++
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c        |  28 +++
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h        |   6 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c          |   3 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c            |   1 +
 drivers/gpu/drm/msm/msm_drv.c                      |   4 +-
 12 files changed, 370 insertions(+), 23 deletions(-)

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1.9.1