[RFC PATCH 2/3] dt-bindings: net: phy: Add support for AT803X

[Michael Walle]

Document the Atheros AR803x PHY bindings.

Signed-off-by: Michael Walle <michael@xxxxxxxx>
---
 .../bindings/net/atheros,at803x.yaml          | 58 +++++++++++++++++++
 include/dt-bindings/net/atheros-at803x.h      | 13 +++++
 2 files changed, 71 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/atheros,at803x.yaml
 create mode 100644 include/dt-bindings/net/atheros-at803x.h

diff --git a/Documentation/devicetree/bindings/net/atheros,at803x.yaml b/Documentation/devicetree/bindings/net/atheros,at803x.yaml
new file mode 100644
index 000000000000..60500fd90fd8
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/atheros,at803x.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: GPL-2.0+
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/atheros,at803x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atheros AR803x PHY
+
+maintainers:
+  - TBD
+
+description: |
+  Bindings for Atheros AR803x PHYs
+
+allOf:
+  - $ref: ethernet-phy.yaml#
+
+properties:
+  atheros,clk-out-frequency:
+    description: Clock output frequency in Hertz.
+    enum: [ 25000000, 50000000, 62500000, 125000000 ]
+
+  atheros,clk-out-strength:
+    description: Clock output driver strength.
+    enum: [ 0, 1, 2 ]
+
+  atheros,keep-pll-enabled:
+    description: |
+      If set, keep the PLL enabled even if there is no link. Useful if you
+      want to use the clock output without an ethernet link.
+    type: boolean
+
+  atheros,rgmii-io-1v8:
+    description: |
+      The PHY supports RGMII I/O voltages of 2.5V, 1.8V and 1.5V. By default,
+      the PHY uses a voltage of 1.5V. If this is set, the voltage will changed
+      to 1.8V.
+      The 2.5V voltage is only supported with an external supply voltage.
+    type: boolean
+
+examples:
+  - |
+    #include <dt-bindings/net/atheros-at803x.h>
+
+    ethernet {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        phy-mode = "rgmii-id";
+
+        ethernet-phy@0 {
+            reg = <0>;
+
+            atheros,clk-out-frequency = <125000000>;
+            atheros,clk-out-strength = <AT803X_STRENGTH_FULL>;
+            atheros,rgmii-io-1v8;
+        };
+    };
diff --git a/include/dt-bindings/net/atheros-at803x.h b/include/dt-bindings/net/atheros-at803x.h
new file mode 100644
index 000000000000..63b4fd10b2c6
--- /dev/null
+++ b/include/dt-bindings/net/atheros-at803x.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Device Tree constants for the Atheros AR803x PHYs
+ */
+
+#ifndef _DT_BINDINGS_ATHEROS_AR803X_H
+#define _DT_BINDINGS_ATHEROS_AR803X_H
+
+#define AT803X_STRENGTH_FULL		0
+#define AT803X_STRENGTH_HALF		1
+#define AT803X_STRENGTH_QUARTER		2
+
+#endif
-- 
2.20.1