Re: [tip: perf/core] perf trace: Introduce --filter for tracepoint events

From: Borislav Petkov
Date: Thu Oct 17 2019 - 03:12:20 EST


On Tue, Oct 15, 2019 at 05:31:43AM -0000, tip-bot2 for Arnaldo Carvalho de Melo wrote:
> The following commit has been merged into the perf/core branch of tip:
>
> Commit-ID: d4097f1937f2242d0aa0a7c654d2159a6895e5c8
> Gitweb: https://git.kernel.org/tip/d4097f1937f2242d0aa0a7c654d2159a6895e5c8
> Author: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
> AuthorDate: Tue, 08 Oct 2019 07:33:08 -03:00
> Committer: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
> CommitterDate: Wed, 09 Oct 2019 11:23:52 -03:00
>
> perf trace: Introduce --filter for tracepoint events
>
> Similar to what is in 'perf record', works just like there:
>
> # perf trace -e msr:*
> 328.297 :0/0 msr:write_msr(msr: FS_BASE, val: 140240388381888)
> 328.302 :0/0 msr:write_msr(msr: FS_BASE, val: 140240388381888)
> 328.306 :0/0 msr:write_msr(msr: FS_BASE, val: 140240388381888)
> 328.317 :0/0 msr:write_msr(msr: FS_BASE, val: 140240388381888)
> 328.322 :0/0 msr:write_msr(msr: FS_BASE, val: 140240388381888)
> 328.327 :0/0 msr:write_msr(msr: FS_BASE, val: 140240388381888)
> 328.331 :0/0 msr:write_msr(msr: FS_BASE, val: 140240388381888)
> 328.336 :0/0 msr:write_msr(msr: FS_BASE, val: 140240388381888)
> 328.340 :0/0 ^Cmsr:write_msr(msr: FS_BASE, val: 140240388381888)

I wonder if you guys can force this val:'s format to be always hex?
Because MSR values are a lot more "natural" in hex...

Thx.

--
Regards/Gruss,
Boris.

https://people.kernel.org/tglx/notes-about-netiquette