[PATCH v4 08/25] drm: kirin: Dynamically allocate the hw_ctx

From: John Stultz
Date: Mon Aug 19 2019 - 19:03:42 EST


From: Xu YiPing <xuyiping@xxxxxxxxxxxxx>

As part of refactoring the kirin driver to better support
different hardware revisions, this patch modifies the
initialization function to dynamically allocate the ade_hw_ctx
structure previously kept as part of struct ade_data.

This is done so that later we can have the hw_ctx point to
hardware revision specific ctx structures.

Cc: Rongrong Zou <zourongrong@xxxxxxxxx>
Cc: Xinliang Liu <z.liuxinliang@xxxxxxxxxxxxx>
Cc: David Airlie <airlied@xxxxxxxx>
Cc: Daniel Vetter <daniel@xxxxxxxx>
Cc: dri-devel <dri-devel@xxxxxxxxxxxxxxxxxxxxx>
Cc: Sam Ravnborg <sam@xxxxxxxxxxxx>
Acked-by: Xinliang Liu <z.liuxinliang@xxxxxxxxxxxxx>
Reviewed-by: Sam Ravnborg <sam@xxxxxxxxxxxx>
Signed-off-by: Xu YiPing <xuyiping@xxxxxxxxxxxxx>
[jstultz: reworded commit message]
Signed-off-by: John Stultz <john.stultz@xxxxxxxxxx>
---
.../gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 39 ++++++++++++-------
1 file changed, 24 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
index fce374ec69e8..ecb507985fea 100644
--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
@@ -72,7 +72,7 @@ struct kirin_plane {
struct ade_data {
struct kirin_crtc crtc;
struct kirin_plane planes[ADE_CH_NUM];
- struct ade_hw_ctx ctx;
+ struct ade_hw_ctx *hw_ctx;
};

/* ade-format info: */
@@ -951,55 +951,62 @@ static int ade_plane_init(struct drm_device *dev, struct kirin_plane *kplane,
return 0;
}

-static int ade_dts_parse(struct platform_device *pdev, struct ade_hw_ctx *ctx)
+static void *ade_hw_ctx_alloc(struct platform_device *pdev)
{
struct resource *res;
struct device *dev = &pdev->dev;
struct device_node *np = pdev->dev.of_node;
+ struct ade_hw_ctx *ctx = NULL;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx) {
+ DRM_ERROR("failed to alloc ade_hw_ctx\n");
+ return ERR_PTR(-ENOMEM);
+ }

res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
ctx->base = devm_ioremap_resource(dev, res);
if (IS_ERR(ctx->base)) {
DRM_ERROR("failed to remap ade io base\n");
- return PTR_ERR(ctx->base);
+ return ERR_PTR(-EIO);
}

ctx->reset = devm_reset_control_get(dev, NULL);
if (IS_ERR(ctx->reset))
- return PTR_ERR(ctx->reset);
+ return ERR_PTR(-ENODEV);

ctx->noc_regmap =
syscon_regmap_lookup_by_phandle(np, "hisilicon,noc-syscon");
if (IS_ERR(ctx->noc_regmap)) {
DRM_ERROR("failed to get noc regmap\n");
- return PTR_ERR(ctx->noc_regmap);
+ return ERR_PTR(-ENODEV);
}

ctx->irq = platform_get_irq(pdev, 0);
if (ctx->irq < 0) {
DRM_ERROR("failed to get irq\n");
- return -ENODEV;
+ return ERR_PTR(-ENODEV);
}

ctx->ade_core_clk = devm_clk_get(dev, "clk_ade_core");
if (IS_ERR(ctx->ade_core_clk)) {
DRM_ERROR("failed to parse clk ADE_CORE\n");
- return PTR_ERR(ctx->ade_core_clk);
+ return ERR_PTR(-ENODEV);
}

ctx->media_noc_clk = devm_clk_get(dev, "clk_codec_jpeg");
if (IS_ERR(ctx->media_noc_clk)) {
DRM_ERROR("failed to parse clk CODEC_JPEG\n");
- return PTR_ERR(ctx->media_noc_clk);
+ return ERR_PTR(-ENODEV);
}

ctx->ade_pix_clk = devm_clk_get(dev, "clk_ade_pix");
if (IS_ERR(ctx->ade_pix_clk)) {
DRM_ERROR("failed to parse clk ADE_PIX\n");
- return PTR_ERR(ctx->ade_pix_clk);
+ return ERR_PTR(-ENODEV);
}

- return 0;
+ return ctx;
}

static int ade_drm_init(struct platform_device *pdev)
@@ -1020,14 +1027,16 @@ static int ade_drm_init(struct platform_device *pdev)
}
platform_set_drvdata(pdev, ade);

- ctx = &ade->ctx;
+ ctx = ade_hw_ctx_alloc(pdev);
+ if (IS_ERR(ctx)) {
+ DRM_ERROR("failed to initialize kirin_priv hw ctx\n");
+ return -EINVAL;
+ }
+ ade->hw_ctx = ctx;
+
kcrtc = &ade->crtc;
kcrtc->hw_ctx = ctx;

- ret = ade_dts_parse(pdev, ctx);
- if (ret)
- return ret;
-
/*
* plane init
* TODO: Now only support primary plane, overlay planes
--
2.17.1