Re: next/master boot bisection: next-20190514 on rk3288-veyron-jaq

From: Doug Anderson
Date: Thu May 16 2019 - 17:49:27 EST


Hi,

From: kernelci.org bot <bot@xxxxxxxxxxxx>
Date: Tue, May 14, 2019 at 9:06 AM
To: <tomeu.vizoso@xxxxxxxxxxxxx>, <guillaume.tucker@xxxxxxxxxxxxx>,
<mgalka@xxxxxxxxxxxxx>, <broonie@xxxxxxxxxx>,
<matthew.hart@xxxxxxxxxx>, <khilman@xxxxxxxxxxxx>,
<enric.balletbo@xxxxxxxxxxxxx>, Elaine Zhang, Eduardo Valentin, Daniel
Lezcano
Cc: Heiko Stuebner, <linux-pm@xxxxxxxxxxxxxxx>,
<linux-kernel@xxxxxxxxxxxxxxx>, <linux-rockchip@xxxxxxxxxxxxxxxxxxx>,
Zhang Rui, <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>

> * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
> * This automated bisection report was sent to you on the basis *
> * that you may be involved with the breaking commit it has *
> * found. No manual investigation has been done to verify it, *
> * and the root cause of the problem may be somewhere else. *
> * Hope this helps! *
> * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
>
> next/master boot bisection: next-20190514 on rk3288-veyron-jaq
>
> Summary:
> Start: 0a13f187b16a Add linux-next specific files for 20190514
> Details: https://kernelci.org/boot/id/5cda7f2259b514876d7a3628
> Plain log: https://storage.kernelci.org//next/master/next-20190514/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.txt
> HTML log: https://storage.kernelci.org//next/master/next-20190514/arm/multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y/gcc-8/lab-collabora/boot-rk3288-veyron-jaq.html
> Result: 691d4947face thermal: rockchip: fix up the tsadc pinctrl setting error
>
> Checks:
> revert: PASS
> verify: PASS
>
> Parameters:
> Tree: next
> URL: git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
> Branch: master
> Target: rk3288-veyron-jaq
> CPU arch: arm
> Lab: lab-collabora
> Compiler: gcc-8
> Config: multi_v7_defconfig+CONFIG_EFI=y+CONFIG_ARM_LPAE=y
> Test suite: boot
>
> Breaking commit found:
>
> -------------------------------------------------------------------------------
> commit 691d4947faceb8bd841900049e07c81c95ca4b0d
> Author: Elaine Zhang <zhangqing@xxxxxxxxxxxxxx>
> Date: Tue Apr 30 18:09:44 2019 +0800
>
> thermal: rockchip: fix up the tsadc pinctrl setting error
>
> Explicitly use the pinctrl to set/unset the right mode
> instead of relying on the pinctrl init mode.
> And it requires setting the tshut polarity before select pinctrl.
>
> When the temperature sensor mode is set to 0, it will automatically
> reset the board via the Clock-Reset-Unit (CRU) if the over temperature
> threshold is reached. However, when the pinctrl initializes, it does a
> transition to "otp_out" which may lead the SoC restart all the time.
>
> "otp_out" IO may be connected to the RESET circuit on the hardware.
> If the IO is in the wrong state, it will trigger RESET.
> (similar to the effect of pressing the RESET button)
> which will cause the soc to restart all the time.
>
> Signed-off-by: Elaine Zhang <zhangqing@xxxxxxxxxxxxxx>
> Reviewed-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>
> Signed-off-by: Eduardo Valentin <edubezval@xxxxxxxxx>

I can confirm that the above commit breaks my jerry, though I haven't
dug into the details. :( Is anyone fixing? For now I'm just booting
with the revert.


-Doug