Re: [PATCH V7 1/2] arm64: dts: freescale: imx8qxp: add cpu opp table

From: Shawn Guo
Date: Thu Feb 28 2019 - 01:43:50 EST


On Thu, Feb 28, 2019 at 06:18:30AM +0000, Anson Huang wrote:
> Hi, Shawn
>
> Best Regards!
> Anson Huang
>
> > -----Original Message-----
> > From: Shawn Guo [mailto:shawnguo@xxxxxxxxxx]
> > Sent: 2019å2æ28æ 11:19
> > To: Anson Huang <anson.huang@xxxxxxx>
> > Cc: robh+dt@xxxxxxxxxx; mark.rutland@xxxxxxx; s.hauer@xxxxxxxxxxxxxx;
> > kernel@xxxxxxxxxxxxxx; festevam@xxxxxxxxx; mturquette@xxxxxxxxxxxx;
> > sboyd@xxxxxxxxxx; Aisheng Dong <aisheng.dong@xxxxxxx>; Daniel Baluta
> > <daniel.baluta@xxxxxxx>; devicetree@xxxxxxxxxxxxxxx; linux-arm-
> > kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; linux-
> > clk@xxxxxxxxxxxxxxx; dl-linux-imx <linux-imx@xxxxxxx>
> > Subject: Re: [PATCH V7 1/2] arm64: dts: freescale: imx8qxp: add cpu opp
> > table
> >
> > On Tue, Feb 26, 2019 at 05:17:31AM +0000, Anson Huang wrote:
> > > Add i.MX8QXP CPU opp table to support cpufreq.
> > >
> > > Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx>
> > > Acked-by: Viresh Kumar <viresh.kumar@xxxxxxxxxx>
> >
> > Prefix 'arm64: dts: imx8qxp: ' would already be clear enough. I dropped
> > 'freescale' from there and applied patch.
> >
> > > ---
> > > No changes since V6.
> > > ---
> > > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 30
> > > ++++++++++++++++++++++++++++++
> > > 1 file changed, 30 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > index 4c3dd95..41bf0ce 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > > @@ -34,6 +34,9 @@
> > > reg = <0x0 0x0>;
> > > enable-method = "psci";
> > > next-level-cache = <&A35_L2>;
> > > + clocks = <&clk IMX_A35_CLK>;
> > > + operating-points-v2 = <&a35_0_opp_table>;
> > > + #cooling-cells = <2>;
> > > };
> > >
> > > A35_1: cpu@1 {
> > > @@ -42,6 +45,9 @@
> > > reg = <0x0 0x1>;
> > > enable-method = "psci";
> > > next-level-cache = <&A35_L2>;
> > > + clocks = <&clk IMX_A35_CLK>;
> > > + operating-points-v2 = <&a35_0_opp_table>;
> > > + #cooling-cells = <2>;
> > > };
> > >
> > > A35_2: cpu@2 {
> > > @@ -50,6 +56,9 @@
> > > reg = <0x0 0x2>;
> > > enable-method = "psci";
> > > next-level-cache = <&A35_L2>;
> > > + clocks = <&clk IMX_A35_CLK>;
> > > + operating-points-v2 = <&a35_0_opp_table>;
> > > + #cooling-cells = <2>;
> > > };
> > >
> > > A35_3: cpu@3 {
> > > @@ -58,6 +67,9 @@
> > > reg = <0x0 0x3>;
> > > enable-method = "psci";
> > > next-level-cache = <&A35_L2>;
> > > + clocks = <&clk IMX_A35_CLK>;
> > > + operating-points-v2 = <&a35_0_opp_table>;
> > > + #cooling-cells = <2>;
> > > };
> > >
> > > A35_L2: l2-cache0 {
> > > @@ -65,6 +77,24 @@
> > > };
> > > };
> > >
> > > + a35_0_opp_table: opp-table {
> >
> > What does the '0' in the label mean?
>
> Looks like the '0' in the label is NOT necessary, we can just use 'a35_opp_table',
> do you want me resend the patch to remove '0'?

No. I just fixed it up and applied the patch.

Shawn