Re: [PATCH] ASoC: rsnd: gen: fix SSI9 4/5/6/7 busif related register address

From: Kuninori Morimoto
Date: Sun Feb 24 2019 - 20:29:05 EST



Hi Jiada

Thank you for your patch

> Currently each SSI unit 's busif mode/adinr/dalign address is
> registered by: (in busif4 case)
> RSND_GEN_M_REG(SSI_BUSIF4_MODE, 0x500, 0x80)
> RSND_GEN_M_REG(SSI_BUSIF4_ADINR,0x504, 0x80)
> RSND_GEN_M_REG(SSI_BUSIF4_DALIGN, 0x508, 0x80)
>
> But according to user manual 41.1.4 Register Configuration
> ssi9 4/5/6/7 busif mode/adinr/dalign register address
> ( SSI9-[4/5/6/7]_BUSIF_[MODE/ADINR/DALIGN] )
> are out of this rule.
>
> This patch registers ssi9 4/5/6/7 mode/adinr/dalign register
> as single register, and access these these registers in case
> of SSI9 BUSIF 4/5/6/7.

I think
- and access these these registers
+ and access these registers

> if ((id == 9) && (busif >= 4)) {
> - struct device *dev = rsnd_priv_to_dev(priv);
> -
> - dev_err(dev, "This driver doesn't support SSI%d-%d, so far",
> - id, busif);
> + rsnd_mod_write(mod, SSI9_BUSIF_ADINR(busif),
> + rsnd_get_adinr_bit(mod, io) | chnl);
> + rsnd_mod_write(mod, SSI9_BUSIF_MODE(busif),
> + rsnd_get_busif_shift(io, mod) | 1);
> + rsnd_mod_write(mod, SSI9_BUSIF_DALIGN(busif),
> + rsnd_get_dalign(mod, io));
> + } else {
> + rsnd_mod_write(mod, SSI_BUSIF_ADINR(busif),
> + rsnd_get_adinr_bit(mod, io) | chnl);
> + rsnd_mod_write(mod, SSI_BUSIF_MODE(busif),
> + rsnd_get_busif_shift(io, mod) | 1);
> + rsnd_mod_write(mod, SSI_BUSIF_DALIGN(busif),
> + rsnd_get_dalign(mod, io));
> }
> -
> - rsnd_mod_write(mod, SSI_BUSIF_ADINR(busif),
> - rsnd_get_adinr_bit(mod, io) |
> - (rsnd_io_is_play(io) ?
> - rsnd_runtime_channel_after_ctu(io) :
> - rsnd_runtime_channel_original(io)));
> - rsnd_mod_write(mod, SSI_BUSIF_MODE(busif),
> - rsnd_get_busif_shift(io, mod) | 1);
> - rsnd_mod_write(mod, SSI_BUSIF_DALIGN(busif),
> - rsnd_get_dalign(mod, io));
> }

Necessary register on rsnd_mod_write() is just number today.
So how about this ? Code will be more simple/readable

if ((id == 9) && (busif >= 4)) {
adinr = SSI9_BUSIF_ADINR();
mode = SSI9_BUSIF_MODE();
daligh = SSI9_BUSIF_DALIGN();
} else {
adinr = SSI_BUSIF_ADINR();
mode = SSI_BUSIF_MODE();
daligh = SSI_BUSIF_DALIGN();
}

rsnd_mod_write(mod, adinr,
rsnd_get_adinr_bit(mod, io) | chnl);
rsnd_mod_write(mod, mode,
rsnd_get_busif_shift(io, mod) | 1);
rsnd_mod_write(mod, dalign,
rsnd_get_dalign(mod, io));