Re: [PATCH 1/9] spi: atmel-quadspi: optimize qspi init

From: Boris Brezillon
Date: Wed Jan 30 2019 - 12:15:27 EST


On Wed, 30 Jan 2019 15:08:29 +0000
<Tudor.Ambarus@xxxxxxxxxxxxx> wrote:

> From: Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx>
>
> Set the QSPI controller in Serial Memory Mode at init and not
> at each exec_op() call.

If you ever want to support regular SPI you'll have to put it back to
atmel_qspi_exec_op(), so I'm not sure this is a good move. Another
approach would be to cache the MR value to avoid doing a write access
on the bus when the value hasn't changed.

>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx>
> ---
> drivers/spi/atmel-quadspi.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
> index ddc712410812..f79b17792a11 100644
> --- a/drivers/spi/atmel-quadspi.c
> +++ b/drivers/spi/atmel-quadspi.c
> @@ -238,8 +238,6 @@ static int atmel_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
> icr = QSPI_ICR_INST(op->cmd.opcode);
> ifr = QSPI_IFR_INSTEN;
>
> - qspi_writel(aq, QSPI_MR, QSPI_MR_SMM);
> -
> mode = find_mode(op);
> if (mode < 0)
> return -ENOTSUPP;
> @@ -381,6 +379,9 @@ static int atmel_qspi_init(struct atmel_qspi *aq)
> /* Reset the QSPI controller */
> qspi_writel(aq, QSPI_CR, QSPI_CR_SWRST);
>
> + /* Set the QSPI controller in Serial Memory Mode */
> + qspi_writel(aq, QSPI_MR, QSPI_MR_SMM);
> +
> /* Enable the QSPI controller */
> qspi_writel(aq, QSPI_CR, QSPI_CR_QSPIEN);
>