[PATCH 4.20 075/117] EDAC, altera: Fix S10 persistent register offset

[Greg Kroah-Hartman]

4.20-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Thor Thayer <thor.thayer@xxxxxxxxxxxxxxx>

commit 245b6c6558128327d330549b23d09594c46f58df upstream.

Correct the persistent register offset where address and status are
stored.

Fixes: 08f08bfb7b4c ("EDAC, altera: Merge Stratix10 into the Arria10 SDRAM probe routine")
Signed-off-by: Thor Thayer <thor.thayer@xxxxxxxxxxxxxxx>
Signed-off-by: Borislav Petkov <bp@xxxxxxx>
Cc: James Morse <james.morse@xxxxxxx>
Cc: Mauro Carvalho Chehab <mchehab@xxxxxxxxxx>
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: dinguyen@xxxxxxxxxx
Cc: linux-edac <linux-edac@xxxxxxxxxxxxxxx>
Cc: mark.rutland@xxxxxxx
Cc: robh+dt@xxxxxxxxxx
Cc: stable <stable@xxxxxxxxxxxxxxx>
Link: https://lkml.kernel.org/r/1548179287-21760-2-git-send-email-thor.thayer@xxxxxxxxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 drivers/edac/altera_edac.h |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

--- a/drivers/edac/altera_edac.h
+++ b/drivers/edac/altera_edac.h
@@ -295,8 +295,8 @@ struct altr_sdram_mc_data {
 #define S10_SYSMGR_ECC_INTSTAT_DERR_OFST  0xA0
 
 /* Sticky registers for Uncorrected Errors */
-#define S10_SYSMGR_UE_VAL_OFST            0x120
-#define S10_SYSMGR_UE_ADDR_OFST           0x124
+#define S10_SYSMGR_UE_VAL_OFST            0x220
+#define S10_SYSMGR_UE_ADDR_OFST           0x224
 
 #define S10_DDR0_IRQ_MASK                 BIT(16)