Re: [PATCH v1 RESEND 6/9] x86/kvm/mmu: make space for source data caching in struct kvm_mmu

[Sean Christopherson]

On Tue, 2018-09-18 at 18:09 +0200, Vitaly Kuznetsov wrote:
> In preparation to MMU reconfiguration avoidance we need a space to
> cache source data. As this partially intersects with kvm_mmu_page_role,
> create 64bit sized union kvm_mmu_role holding both base_role and
> extended data. No functional change.
> 
> Signed-off-by: Vitaly Kuznetsov <vkuznets@xxxxxxxxxx>
> ---
> Âarch/x86/include/asm/kvm_host.h | 14 +++++++++++++-
> Âarch/x86/kvm/mmu.cÂÂÂÂÂÂÂÂÂÂÂÂÂÂ| 19 ++++++++++++-------
> Âarch/x86/kvm/vmx.cÂÂÂÂÂÂÂÂÂÂÂÂÂÂ|ÂÂ2 +-
> Â3 files changed, 26 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 527aaf45eba6..6ca7d28d57e9 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -273,6 +273,18 @@ union kvm_mmu_page_role {
> Â	};
> Â};
> Â
> +union kvm_mmu_scache {

What about "kvm_mmu_extended_role" and a variable name of "ext"?
scache might be interpreted as "shadow cache", whereas I think you
intend "source cache". ÂAnd it isn't immediately clear (to me) what
"source" refers to.

> +	unsigned int word;
> +};
> +
> +	unsigned long as_u64;
> +	struct {
> +		union kvm_mmu_page_role base_role;

Would it make sense to shorten this to simply "base"? ÂThe usage
looks like it's always deferenced in the context of kvm_mmu_role,
i.e. the "role" part appears to be redundant. ÂAnd if scache were
renamed we'd end up with e.g. mmu_role.base and mmu_role.ext.

> +		union kvm_mmu_scache scache;
> +	};
> +};
> +
> Âstruct kvm_rmap_head {
> Â	unsigned long val;
> Â};
> @@ -360,7 +372,7 @@ struct kvm_mmu {
> Â	void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
> Â			ÂÂÂu64 *spte, const void *pte);
> Â	hpa_t root_hpa;
> -	union kvm_mmu_page_role base_role;
> +	union kvm_mmu_role mmu_role;
> Â	u8 root_level;
> Â	u8 shadow_root_level;
> Â	u8 ept_ad;
> diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
> index 5f167823c50d..8d8e6fa75fa3 100644
> --- a/arch/x86/kvm/mmu.c
> +++ b/arch/x86/kvm/mmu.c
> @@ -2359,7 +2359,7 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
> Â	int collisions = 0;
> Â	LIST_HEAD(invalid_list);
> Â
> -	role = vcpu->arch.mmu->base_role;
> +	role = vcpu->arch.mmu->mmu_role.base_role;
> Â	role.level = level;
> Â	role.direct = direct;
> Â	if (role.direct)
> @@ -4407,7 +4407,8 @@ static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
> Âvoid
> Âreset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
> Â{
> -	bool uses_nx = context->nx || context->base_role.smep_andnot_wp;
> +	bool uses_nx = context->nx ||
> +		context->mmu_role.base_role.smep_andnot_wp;
> Â	struct rsvd_bits_validate *shadow_zero_check;
> Â	int i;
> Â
> @@ -4726,7 +4727,7 @@ static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
> Â{
> Â	struct kvm_mmu *context = vcpu->arch.mmu;
> Â
> -	context->base_role.word = mmu_base_role_mask.word &
> +	context->mmu_role.base_role.word = mmu_base_role_mask.word &
> Â				ÂÂkvm_calc_tdp_mmu_root_page_role(vcpu).word;
> Â	context->page_fault = tdp_page_fault;
> Â	context->sync_page = nonpaging_sync_page;
> @@ -4807,7 +4808,7 @@ void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu)
> Â	else
> Â		paging32_init_context(vcpu, context);
> Â
> -	context->base_role.word = mmu_base_role_mask.word &
> +	context->mmu_role.base_role.word = mmu_base_role_mask.word &
> Â				ÂÂkvm_calc_shadow_mmu_root_page_role(vcpu).word;
> Â	reset_shadow_zero_bits_mask(vcpu, context);
> Â}
> @@ -4816,7 +4817,7 @@ EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
> Âstatic union kvm_mmu_page_role
> Âkvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty)
> Â{
> -	union kvm_mmu_page_role role = vcpu->arch.mmu->base_role;
> +	union kvm_mmu_page_role role = vcpu->arch.mmu->mmu_role.base_role;
> Â
> Â	role.level = PT64_ROOT_4LEVEL;
> Â	role.direct = false;
> @@ -4846,7 +4847,8 @@ void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
> Â	context->update_pte = ept_update_pte;
> Â	context->root_level = PT64_ROOT_4LEVEL;
> Â	context->direct_map = false;
> -	context->base_role.word = root_page_role.word & mmu_base_role_mask.word;
> +	context->mmu_role.base_role.word =
> +		root_page_role.word & mmu_base_role_mask.word;
> Â	context->get_pdptr = kvm_pdptr_read;
> Â
> Â	update_permission_bitmask(vcpu, context, true);
> @@ -5161,10 +5163,13 @@ static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
> Â
> Â		local_flush = true;
> Â		while (npte--) {
> +			unsigned int base_role =
> +				vcpu->arch.mmu->mmu_role.base_role.word;
> +
> Â			entry = *spte;
> Â			mmu_page_zap_pte(vcpu->kvm, sp, spte);
> Â			if (gentry &&
> -			ÂÂÂÂÂÂ!((sp->role.word ^ vcpu->arch.mmu->base_role.word)
> +			ÂÂÂÂÂÂ!((sp->role.word ^ base_role)
> Â			ÂÂÂÂÂÂ& mmu_base_role_mask.word) && rmap_can_add(vcpu))
> Â				mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
> Â			if (need_remote_flush(entry, *spte))
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 29af40b9239f..79e0b0570dd1 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -9290,7 +9290,7 @@ static int nested_vmx_eptp_switching(struct kvm_vcpu *vcpu,
> Â
> Â		kvm_mmu_unload(vcpu);
> Â		mmu->ept_ad = accessed_dirty;
> -		mmu->base_role.ad_disabled = !accessed_dirty;
> +		mmu->mmu_role.base_role.ad_disabled = !accessed_dirty;
> Â		vmcs12->ept_pointer = address;
> Â		/*
> Â		Â* TODO: Check what's the correct approach in case