Re: [PATCH i2c-next v6] i2c: aspeed: Handle master/slave combined irq events properly

From: Jae Hyun Yoo
Date: Fri Sep 14 2018 - 12:53:58 EST


On 9/14/2018 6:23 AM, Guenter Roeck wrote:
On 09/13/2018 10:38 PM, CÃdric Le Goater wrote:
That seems to suggest that none of the status bits auto-clears, and that
the above code clearing intr_status should be removed entirely.
Am I missing something ?

You are right. I just pushed another version of the previous patch with this
new hunk :

@@ -188,7 +200,6 @@ static void aspeed_i2c_bus_handle_cmd(As
ÂÂ {
ÂÂÂÂÂÂ bus->cmd &= ~0xFFFF;
ÂÂÂÂÂÂ bus->cmd |= value & 0xFFFF;
-ÂÂÂ bus->intr_status = 0;
ÂÂ ÂÂÂÂÂ if (bus->cmd & I2CD_M_START_CMD) {
ÂÂÂÂÂÂÂÂÂÂ uint8_t state = aspeed_i2c_get_state(bus) & I2CD_MACTIVE ?


The QEMU palmetto and witherspoon machines seem to behave fine. Can you give
it a try ?


Works fine for me for all affected qemu platforms.

How do you want to proceed with the qemu patches ? I attached my patches
for reference. Maybe you can add them to your tree if they are ok and submit
the entire series together to the qemu mailing list ?

yes. They are pushed in my aspeed-3.1 branch. I will send the series
on the list.


Excellent. Thanks a lot!

Guenter


Awesome! Many thanks to Guenter, CÃdric and Joel. I really appreciate
it.

Jae