Re: [PATCH] clk: aspeed: Mark bclk (PCIe) and dclk (VGA) as critical

From: Stephen Boyd
Date: Fri Jul 06 2018 - 16:48:21 EST


Quoting Joel Stanley (2018-06-07 00:09:59)
> This is used by the host to talk to the BMC's PCIe slave device. The BMC
> is not involved, but the clock needs to be enabled so the host can use
> the device.
>
> Fixes: 15ed8ce5f84e ("clk: aspeed: Register gated clocks")
> Cc: stable@xxxxxxxxxxxxxxx # 4.15
> Acked-by: Andrew Jeffery <andrew@xxxxxxxx>
> Tested-by: Lei YU <mine260309@xxxxxxxxx>
> Signed-off-by: Joel Stanley <joel@xxxxxxxxx>
> ---

Applied to clk-fixes