Re: [PATCH v2 1/2] dt-bindings: cpufreq: Introduce QCOM CPUFREQ FW bindings

[Taniya Das]

On 5/23/2018 8:43 PM, Sudeep Holla wrote:
> On 19/05/18 18:34, Taniya Das wrote:
> > Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
> > SoCs. This is required for managing the cpu frequency transitions which are
> > controlled by firmware.
> >
> > Signed-off-by: Taniya Das <tdas@xxxxxxxxxxxxxx>
> > ---
> >   .../bindings/cpufreq/cpufreq-qcom-fw.txt           | 68 ++++++++++++++++++++++
> >   1 file changed, 68 insertions(+)
> >   create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt
> >
> > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt
> > new file mode 100644
> > index 0000000..bc912f4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-fw.txt
> > @@ -0,0 +1,68 @@
> > +Qualcomm Technologies, Inc. CPUFREQ Bindings
> > +
> > +CPUFREQ FW is a hardware engine used by some Qualcomm Technologies, Inc. (QTI)
> > +SoCs to manage frequency in hardware. It is capable of controlling frequency
> > +for multiple clusters.
> > +
> > +Properties:
> > +- compatible
> > +	Usage:		required
> > +	Value type:	<string>
> > +	Definition:	must be "qcom,cpufreq-fw".
> > +
>
> If the firmware is referred with some other name, better to use that
> than cpufreq
> > +Note that #address-cells, #size-cells, and ranges shall be present to ensure
> > +the cpufreq can address a freq-domain registers.
> > +
> > +A freq-domain sub-node would be defined for the cpus with the following
> > +properties:
> > +
> > +- compatible:
> > +	Usage:		required
> > +	Value type:	<string>
> > +	Definition:	must be "cpufreq".
> > +
> > +- reg
> > +	Usage:		required
> > +	Value type:	<prop-encoded-array>
> > +	Definition:	Addresses and sizes for the memory of the perf_base
> > +			, lut_base and en_base.
>
> Can you explicitly define each one of them ? Either here or in reg-names.

Sure will define each of them in the next series.

> > +- reg-names
> > +	Usage:		required
> > +	Value type:	<stringlist>
> > +	Definition:	Address names. Must be "perf_base", "lut_base",
> > +			"en_base".
> > +			Must be specified in the same order as the
> > +			corresponding addresses are specified in the reg
> > +			property.
> > +
> > +- qcom,cpulist
> > +	Usage:		required
> > +	Value type:	<phandles of CPU>
> > +	Definition:	List of related cpu handles which are under a cluster.
> > +
>
> As already mentioned by Rob and Viresh, better to align with OPP style
> to avoid phandle list of CPUs.

I have put down an example device tree node for Rob & Viresh to review.

> Also I see similar bindings for devfreq, can't they be aligned ?
> E.g. lut_base here while it's ftbl_base in devfreq.

It is actually the look up table, thus was the name given as "lut". Will 
check with Saravana for devfreq and align accordingly.


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