Re: [PATCH] arm64: dts: exynos: fix type of thermal trip points for Exynos7

From: Krzysztof Kozlowski
Date: Tue May 15 2018 - 13:38:39 EST


On Tue, May 15, 2018 at 2:37 PM, Bartlomiej Zolnierkiewicz
<b.zolnierkie@xxxxxxxxxxx> wrote:
> Currently Exynos thermal driver treats as "active" all specified
> trip points before reaching maximum number of hardware supported
> trip points.

The trip point type describe the way how system should act - use
active or passive cooling. It is independent of thermal driver. I do
not understand what is exactly wrong... maybe except whether the trip
point is active/passive looks like property of board, not SoC itself,
but your patch does not address it.

> Moreover polling-delay-passive is specified as "0"
> in exynos7.dtsi (IOW passive polling is disabled).

Which is perfectly fine. TMU driver for Exynos7 supports up to eight
trip points in interrupt mode so having polling mode = 0 is good. IOW
passive polling is disabled just like active polling is disabled so
what did you want to say here?

Best regards,
Krzysztof

> Therefore fix
> type of cpu-alert-0 to cpu-alert6 trip points to be "active"
> instead of "passive" (cpu-alert-7 type is "critical" so it
> doesn't need a fixup).
>
> Cc: Alim Akhtar <alim.akhtar@xxxxxxxxxxx>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> Index: b/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi
> ===================================================================
> --- a/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi 2018-05-15 13:57:55.822172496 +0200
> +++ b/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi 2018-05-15 14:23:12.594016481 +0200
> @@ -10,37 +10,37 @@ trips {
> cpu-alert-0 {
> temperature = <75000>; /* millicelsius */
> hysteresis = <10000>; /* millicelsius */
> - type = "passive";
> + type = "active";
> };
> cpu-alert-1 {
> temperature = <80000>; /* millicelsius */
> hysteresis = <10000>; /* millicelsius */
> - type = "passive";
> + type = "active";
> };
> cpu-alert-2 {
> temperature = <85000>; /* millicelsius */
> hysteresis = <10000>; /* millicelsius */
> - type = "passive";
> + type = "active";
> };
> cpu-alert-3 {
> temperature = <90000>; /* millicelsius */
> hysteresis = <10000>; /* millicelsius */
> - type = "passive";
> + type = "active";
> };
> cpu-alert-4 {
> temperature = <95000>; /* millicelsius */
> hysteresis = <10000>; /* millicelsius */
> - type = "passive";
> + type = "active";
> };
> cpu-alert-5 {
> temperature = <100000>; /* millicelsius */
> hysteresis = <10000>; /* millicelsius */
> - type = "passive";
> + type = "active";
> };
> cpu-alert-6 {
> temperature = <110000>; /* millicelsius */
> hysteresis = <10000>; /* millicelsius */
> - type = "passive";
> + type = "active";
> };
> cpu-crit-0 {
> temperature = <115000>; /* millicelsius */
>