Re: [patch RFC 5/5] x86/speculation: Add basic speculation control code

From: David Woodhouse
Date: Wed Jan 10 2018 - 07:51:32 EST


On Wed, 2018-01-10 at 13:47 +0100, Jiri Kosina wrote:
> On Wed, 10 Jan 2018, Andrea Arcangeli wrote:
>
> > Perhaps the confusing come from "less privileged prediction mode" and
> > you thought that meant "less privileged ring mode". It says "predction
> > mode" not ring 3.
>
> Well, prediction mode is defined by "CPL3 vs CPL0-2" and "VMX root vs VMXÂ
> non-root", with obvious ordering of privileges.
>
> So if IBRS is set, branch predictor will not allow the predicted target toÂ
> be influenced by code that executed in less privileged prediction modeÂ
> before value of '1' IBRS mode was last written to, and that's pretty muchÂ
> it.

The operative words in that sentence being, "before the IBRS mode was
last written with a value of 1".

If it worked as Andrea suggests, then there would be absolutely no
point in the patches we've seen which add the IBRS-frobbing on syscall
entry and vmexit.

The "IBRS all the time" feature is something we get on *future*
hardware, not current hardware.

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