[PATCH RFC 0/6] x86/kvm/hyperv: stable clocksorce for L2 guests when running nested KVM on Hyper-V

From: Vitaly Kuznetsov
Date: Fri Dec 01 2017 - 08:13:33 EST


Currently, KVM passes PVCLOCK_TSC_STABLE_BIT to its guests when running in
so called 'masterclock' mode and this is only possible when the clocksource
on the host is TSC. When running nested on Hyper-V we're using a different
clocksource in L1 (Hyper-V TSC Page) which can actually be used for
masterclock. This series brings the required support.

Making KVM work with TSC page clocksource is relatively easy, it is done in
PATCH 5 of the series. All the rest is required to support L1 migration
when TSC frequency changes, we use a special feature from Hyper-V to do
the job.

Vitaly Kuznetsov (6):
x86/hyper-v: check for required priviliges in hyperv_init()
x86/hyper-v: add a function to read both TSC and TSC page value
simulateneously
x86/hyper-v: reenlightenment notifications support
x86/hyper-v: redirect reenlightment notifications on CPU offlining
x86/kvm: pass stable clocksource to guests when running nested on
Hyper-V
x86/kvm: support Hyper-V reenlightenment

arch/x86/entry/entry_64.S | 4 ++
arch/x86/hyperv/hv_init.c | 108 ++++++++++++++++++++++++++++++++++++-
arch/x86/include/asm/entry_arch.h | 4 ++
arch/x86/include/asm/hw_irq.h | 1 +
arch/x86/include/asm/irq_vectors.h | 7 ++-
arch/x86/include/asm/mshyperv.h | 32 +++++++++--
arch/x86/include/uapi/asm/hyperv.h | 27 ++++++++++
arch/x86/kernel/idt.c | 3 ++
arch/x86/kvm/x86.c | 104 +++++++++++++++++++++++++++++------
9 files changed, 267 insertions(+), 23 deletions(-)

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2.14.3