Re: [PATCH 04/23] x86, tlb: make CR4-based TLB flushes more robust

[Kirill A. Shutemov]

On Wed, Nov 01, 2017 at 03:38:23AM -0700, Andy Lutomirski wrote:
> On Wed, Nov 1, 2017 at 3:11 AM, Kirill A. Shutemov <kirill@xxxxxxxxxxxxx> wrote:
> > On Wed, Nov 01, 2017 at 01:01:45AM -0700, Andy Lutomirski wrote:
> >> On Tue, Oct 31, 2017 at 3:31 PM, Dave Hansen
> >> <dave.hansen@xxxxxxxxxxxxxxx> wrote:
> >> >
> >> > Our CR4-based TLB flush currently requries global pages to be
> >> > supported *and* enabled.  But, we really only need for them to be
> >> > supported.  Make the code more robust by alllowing X86_CR4_PGE to
> >> > clear as well as set.
> >> >
> >> > This change was suggested by Kirill Shutemov.
> >>
> >> I may have missed something, but why would be ever have CR4.PGE off?
> >
> > This came out from me thinking on if we can disable global pages by not
> > turning on CR4.PGE instead of making _PAGE_GLOBAL zero.
> >
> > Dave decided to not take this path, but this change would make
> > __native_flush_tlb_global_irq_disabled() a bit less fragile in case
> > if the situation would change in the future.
> 
> How about just adding a VM_WARN_ON_ONCE, then?

What's wrong with xor? The function will continue to work this way even if
CR4.PGE is disabled.

-- 
 Kirill A. Shutemov