Re: [PATCH 0/3] Simple DVFS support for Allwinner A64 SoC

From: Maxime Ripard
Date: Mon Sep 25 2017 - 06:28:00 EST


On Mon, Sep 25, 2017 at 10:12:09AM +0000, Icenowy Zheng wrote:
> ä 2017å9æ25æ GMT+08:00 äå6:10:27, Maxime Ripard <maxime.ripard@xxxxxxxxxxxxxxxxxx> åå:
> >Hi,
> >
> >On Sat, Sep 23, 2017 at 12:15:28AM +0000, Icenowy Zheng wrote:
> >> This patchset imports simple DVFS support for Allwinner A64 SoC.
> >>
> >> As the thermal sensor driver is not yet implemented and some boards
> >> have still no AXP PMIC support, now only two OPPs are present --
> >> 648MHz@xxxxx and 816MHz@xxxx to prevent overheat or undervoltage.
> >>
> >> PATCH 1 is a fix to the CCU driver of A64, and the remaining patches
> >> set up the device tree bits of the DVFS on Pine64.
> >
> >How has this been tested?
> >
> >What tasks did you run, with what governor, etc...
>
> I only tested manual frequency switching between 648MHz and
> 816MHz, and tested the PLL stuck issue by change the OPPs to
> some random value.

Ideally, we should test that it's actually reliable. Poorly chosen
OPPs might lead to corrupt data that you might not get before a while.

Please test using:
https://linux-sunxi.org/Hardware_Reliability_Tests#Reliability_of_cpufreq_voltage.2Ffrequency_settings

And post the report.

Maxime

--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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