Re: [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register

[David Miller]

From: Fahad Kunnathadi <fahad.kunnathadi@xxxxxxxxxxxxxxxxx>
Date: Fri, 15 Sep 2017 12:01:58 +0530

> To clear Speed Selection in MDIO control register(0x10),
> ie, clear bits 6 and 13 to zero while keeping other bits same.
> Before AND operation,The Mask value has to be perform with bitwise NOT
> operation (ie, ~ operator)
> 
> This patch clears current speed selection before writing the
> new speed settings to gmii2rgmii converter
> 
> Fixes: f411a6160bd4 ("net: phy: Add gmiitorgmii converter support")
> 
> Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@xxxxxxxxxxxxxxxxx>
> Reviewed-by: Andrew Lunn <andrew@xxxxxxx>

Applied and queued up for -stable, thanks.