Re: [PATCH 2/3] KVM: X86: implement the logic for spinlock optimization

[Paolo Bonzini]

On 07/08/2017 10:44, Longpeng(Mike) wrote:
> +
> +	/*
> +	 * Intel sdm vol3 ch-25.1.3 says: The âPAUSE-loop exitingâ
> +	 * VM-execution control is ignored if CPL > 0. So the vcpu
> +	 * is always exiting with CPL=0 if it uses PLE.

This is not true (how can it be?).  What 25.1.3 says is, the VCPU is
always at CPL=0 if you get a PAUSE exit (reason 40) and PAUSE exiting is
0 (it always is for KVM).  But here you're looking for a VCPU that
didn't get a PAUSE exit, so the CPL can certainly be 3.

However, I understand that vmx_get_cpl can be a bit slow here.  You can
actually read SS's access rights directly in this function and get the
DPL from there, that's going to be just a single VMREAD.

The only difference is when vmx->rmode.vm86_active=1.  However,
pause-loop exiting is not working properly anyway if
vmx->rmode.vm86_active=1, because CPL=3 according to the processor.

Paolo

> +	 * The following block needs less cycles than vmx_get_cpl().
> +	 */
> +	if (cpu_has_secondary_exec_ctrls())
> +		secondary_exec_ctrl = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
> +	if (secondary_exec_ctrl & SECONDARY_EXEC_PAUSE_LOOP_EXITING)
> +		return true;
> +

Paolo