Re: [PATCH] x86/mce/AMD: Fix partial SMCA bank init when CPU 0 != thread 0

From: Borislav Petkov
Date: Wed Jun 28 2017 - 05:22:54 EST


On Tue, Jun 27, 2017 at 07:06:30PM -0500, Jack Miller wrote:
> After a call to firmware SwitchBSP(),

What is that and who does that?

> Linux can be booted with a thread
> that isn't the first in the system. That thread automatically becomes
> CPU 0.

Btw, you should be seeing other explosions too as a lot of code assumes
CPU 0 is the BSP.

...

> Signed-off-by: Jack Miller <jack@xxxxxxxxxxx>
> ---
> arch/x86/kernel/cpu/mcheck/mce_amd.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> index 6e4a047e4b68..9d74adcf34d2 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> @@ -170,8 +170,8 @@ static void get_smca_bank_info(unsigned int bank)
> struct smca_hwid *s_hwid;
> u32 high, instance_id;
>
> - /* Collect bank_info using CPU 0 for now. */
> - if (cpu)
> + /* Collect bank_info using hardware thread 0 for now. */
> + if (apic->get_apic_id(apic->read(APIC_ID)) != 0)

Does

if (cpu != boot_cpu_data.cpu_index)
return;

work?


--
Regards/Gruss,
Boris.

SUSE Linux GmbH, GF: Felix ImendÃrffer, Jane Smithard, Graham Norton, HRB 21284 (AG NÃrnberg)
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