Re: Question about DEC Alpha memory ordering

From: Michael Cree
Date: Tue Feb 14 2017 - 14:28:01 EST


On Tue, Feb 14, 2017 at 12:35:58PM +0100, Andrea Parri wrote:
> On Mon, Feb 13, 2017 at 01:24:36PM -0800, Paul E. McKenney wrote:
> > ------------------------------------------------------------------------
> >
> > C auto/C-LB-LRW+OB-Ov
> > (*
> > * Result: Maybe
> > * P0-P1 rf OB-Ov: Never->Maybe: Note lack of C11 guarantee, control dependency
> > * P1 Ov,LRW: Note lack of C11 guarantee, control dependency
> > *)
> > {
> > }
> >
> > P0(int *u0, int *x1)
> > {
> > r1 = READ_ONCE(*u0);
> > smp_mb();
> > WRITE_ONCE(*x1, 1);
> > }
> >
> >
> > P1(int *u0, int *x1)
> > {
> > r1 = READ_ONCE(*x1);
> > WRITE_ONCE(*u0, r1);
> > }
> >
> > exists
> > (0:r1=1 /\ 1:r1=1)
> >
>
> The (automatically generated) module for this test is at
>
> http://retis.sssup.it/~a.parri/lkmm/C-LB-LRW+OB-Ov.tgz ;
>
> the test is run by cat-ing /sys/kernel/litmus/p_count: this will execute
> the thread bodies for "runs * size" iterations; results can be sentisive
> to the "stride" and "affinity increment" parameters (c.f., the Makefile);
> statistics for each experiments are printed on stdout.

This is the test run on a 3-cpu ES45 with the settings in the Makefile:

Test auto/LB-LRW+OB-Ov Allowed
Histogram (2 states)
5913093 :> 0:r1=0; 1:r1=0;
4086907 :> 0:r1=0; 1:r1=1;
No
Witnesses
Positive: 0 Negative: 10000000
Condition exists (0:r1=1 /\ 1:r1=1) is NOT validated
Observation auto/LB-LRW+OB-Ov Never 0 10000000
Time auto/LB-LRW+OB-Ov 9.570
Hash=200258693ffc841829310726a4a0b7e3

How do we interpret these results?

Cheers
Michael.
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