Re: [PATCH 4.8 14/37] drm/amdgpu: fix power state when port pm is unavailable

From: Peter Wu
Date: Wed Nov 30 2016 - 05:51:28 EST



Hi Greg,

On Wed, Nov 30, 2016 at 10:29:51AM +0100, Greg Kroah-Hartman wrote:
> 4.8-stable review patch. If anyone has any objections, please let me know.

Please delay this patch (amd tje mext radeon patch, 15/37), it contains
a regression for which these patches (from drm-fixes) are needed:

drm/radeon: fix check for port PM availability
drm/amdgpu: fix check for port PM availability

Patches should appear in v4.9-rc8 via
https://cgit.freedesktop.org/~airlied/linux/log/?h=drm-fixes

Kind regards,
Peter

> ------------------
>
> From: Peter Wu <peter@xxxxxxxxxxxxx>
>
> commit 1db4496f167bcc7c6541d449355ade2e7d339d52 upstream.
>
> When PCIe port PM is not enabled (system BIOS is pre-2015 or the
> pcie_port_pm=off parameter is set), legacy ATPX PM should still be
> marked as supported. Otherwise the GPU can fail to power on after
> runtime suspend. This affected a Dell Inspiron 5548.
>
> Ideally the BIOS date in the PCI core is lowered to 2013 (the first year
> where hybrid graphics platforms using power resources was introduced),
> but that seems more risky at this point and would not solve the
> pcie_port_pm=off issue.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98505
> Reported-and-tested-by: Nayan Deshmukh <nayan26deshmukh@xxxxxxxxx>
> Signed-off-by: Peter Wu <peter@xxxxxxxxxxxxx>
> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
> Acked-by: Christian König <christian.koenig@xxxxxxx>
> Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> @@ -33,6 +33,7 @@ struct amdgpu_atpx {
>
> static struct amdgpu_atpx_priv {
> bool atpx_detected;
> + bool bridge_pm_usable;
> /* handle for device - and atpx */
> acpi_handle dhandle;
> acpi_handle other_handle;
> @@ -200,7 +201,11 @@ static int amdgpu_atpx_validate(struct a
> atpx->is_hybrid = false;
> if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
> printk("ATPX Hybrid Graphics\n");
> - atpx->functions.power_cntl = false;
> + /*
> + * Disable legacy PM methods only when pcie port PM is usable,
> + * otherwise the device might fail to power off or power on.
> + */
> + atpx->functions.power_cntl = !amdgpu_atpx_priv.bridge_pm_usable;
> atpx->is_hybrid = true;
> }
>
> @@ -471,6 +476,7 @@ static int amdgpu_atpx_power_state(enum
> */
> static bool amdgpu_atpx_pci_probe_handle(struct pci_dev *pdev)
> {
> + struct pci_dev *parent_pdev = pci_upstream_bridge(pdev);
> acpi_handle dhandle, atpx_handle;
> acpi_status status;
>
> @@ -485,6 +491,7 @@ static bool amdgpu_atpx_pci_probe_handle
> }
> amdgpu_atpx_priv.dhandle = dhandle;
> amdgpu_atpx_priv.atpx.handle = atpx_handle;
> + amdgpu_atpx_priv.bridge_pm_usable = parent_pdev && parent_pdev->bridge_d3;
> return true;
> }
>
>
>