Re: [PATCH v3 5/7] clk: qcom: ipq4019: corrected sdcc frequency and parent name

[Stephen Boyd]

On 09/21, Abhishek Sahu wrote:
> 1. The parent for sdcc clock is sdccpll so corrected the same
>    in its parent map.
> 2. The frequency value was wrong so changed to correct
>    frequency.
> 
> Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx>
> ---
>  drivers/clk/qcom/gcc-ipq4019.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c
> index 160e0cf..b2decd5 100644
> --- a/drivers/clk/qcom/gcc-ipq4019.c
> +++ b/drivers/clk/qcom/gcc-ipq4019.c
> @@ -120,7 +120,7 @@ static struct parent_map gcc_xo_sdcc1_500_map[] = {
>  
>  static const char * const gcc_xo_sdcc1_500[] = {
>  	"xo",
> -	"ddrpll",
> +	"ddrpllsdcc",
>  	"fepll500",
>  };
>  
> @@ -540,13 +540,13 @@ static struct clk_branch gcc_gp3_clk = {
>  };
>  
>  static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk[] = {
> -	F(144000,    P_XO,			1,  3, 240),
> -	F(400000,    P_XO,			1,  1, 0),
> -	F(20000000,  P_FEPLL500,		1,  1, 25),
> -	F(25000000,  P_FEPLL500,		1,  1, 20),
> -	F(50000000,  P_FEPLL500,		1,  1, 10),
> -	F(100000000, P_FEPLL500,		1,  1, 5),

None of these changed? Please leave them alone then.

> -	F(193000000, P_DDRPLL,		1,  0, 0),
> +	F(144000,    P_XO,       1,  3, 240),
> +	F(400000,    P_XO,       1,  1, 0),
> +	F(20000000,  P_FEPLL500, 1,  1, 25),
> +	F(25000000,  P_FEPLL500, 1,  1, 20),
> +	F(50000000,  P_FEPLL500, 1,  1, 10),
> +	F(100000000, P_FEPLL500, 1,  1, 5),
> +	F(190000000, P_DDRPLL,   1,  0, 0),

And tab out this one appropriately so that it lines up. Then the
diff is very clear.

>  	{ }

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