Re: [Intel-gfx] [PATCH 2/6] drm/i915/skl: Remove linetime from skl_wm_values

From: Paulo Zanoni
Date: Wed Oct 05 2016 - 16:24:49 EST


Em Qua, 2016-10-05 Ãs 11:33 -0400, Lyude escreveu:
> Next part of cleaning up the watermark code for skl. This is easy,
> since
> it seems that we never actually needed to keep track of the linetime
> in
> the skl_wm_values struct anyway.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>

>
> Signed-off-by: Lyude <cpaul@xxxxxxxxxx>
> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
> Cc: Ville SyrjÃlà <ville.syrjala@xxxxxxxxxxxxxxx>
> Cc: Matt Roper <matthew.d.roper@xxxxxxxxx>
> ---
> Âdrivers/gpu/drm/i915/i915_drv.hÂÂÂÂÂÂ| 1 -
> Âdrivers/gpu/drm/i915/intel_display.c | 6 ++++--
> Âdrivers/gpu/drm/i915/intel_pm.cÂÂÂÂÂÂ| 7 +------
> Â3 files changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 85e541c..d26e5999 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1643,7 +1643,6 @@ struct skl_ddb_allocation {
> Âstruct skl_wm_values {
> Â unsigned dirty_pipes;
> Â struct skl_ddb_allocation ddb;
> - uint32_t wm_linetime[I915_MAX_PIPES];
> Â uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8];
> Â uint32_t plane_trans[I915_MAX_PIPES][I915_MAX_PLANES];
> Â};
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 17733af..a71d05a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14832,6 +14832,8 @@ static void intel_begin_crtc_commit(struct
> drm_crtc *crtc,
> Â struct drm_device *dev = crtc->dev;
> Â struct drm_i915_private *dev_priv = to_i915(dev);
> Â struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> + struct intel_crtc_state *intel_cstate =
> + to_intel_crtc_state(crtc->state);
> Â struct intel_crtc_state *old_intel_state =
> Â to_intel_crtc_state(old_crtc_state);
> Â bool modeset = needs_modeset(crtc->state);
> @@ -14848,13 +14850,13 @@ static void intel_begin_crtc_commit(struct
> drm_crtc *crtc,
> Â intel_color_load_luts(crtc->state);
> Â }
> Â
> - if (to_intel_crtc_state(crtc->state)->update_pipe)
> + if (intel_cstate->update_pipe)
> Â intel_update_pipe_config(intel_crtc,
> old_intel_state);
> Â else if (INTEL_GEN(dev_priv) >= 9) {
> Â skl_detach_scalers(intel_crtc);
> Â
> Â I915_WRITE(PIPE_WM_LINETIME(pipe),
> - ÂÂÂdev_priv->wm.skl_hw.wm_linetime[pipe]);
> + ÂÂÂintel_cstate->wm.skl.optimal.linetime);
> Â }
> Â}
> Â
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 0383516..af96888 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3839,8 +3839,6 @@ static void skl_compute_wm_results(struct
> drm_device *dev,
> Â temp |= PLANE_WM_EN;
> Â
> Â r->plane_trans[pipe][PLANE_CURSOR] = temp;
> -
> - r->wm_linetime[pipe] = p_wm->linetime;
> Â}
> Â
> Âstatic void skl_ddb_entry_write(struct drm_i915_private *dev_priv,
> @@ -4069,7 +4067,6 @@ skl_copy_wm_for_pipe(struct skl_wm_values *dst,
> Â ÂÂÂÂÂstruct skl_wm_values *src,
> Â ÂÂÂÂÂenum pipe pipe)
> Â{
> - dst->wm_linetime[pipe] = src->wm_linetime[pipe];
> Â memcpy(dst->plane[pipe], src->plane[pipe],
> Â ÂÂÂÂÂÂÂsizeof(dst->plane[pipe]));
> Â memcpy(dst->plane_trans[pipe], src->plane_trans[pipe],
> @@ -4320,8 +4317,6 @@ static void skl_pipe_wm_get_hw_state(struct
> drm_crtc *crtc)
> Â
> Â max_level = ilk_wm_max_level(dev);
> Â
> - hw->wm_linetime[pipe] = I915_READ(PIPE_WM_LINETIME(pipe));
> -
> Â for (level = 0; level <= max_level; level++) {
> Â for (i = 0; i < intel_num_planes(intel_crtc); i++)
> Â hw->plane[pipe][i][level] =
> @@ -4338,7 +4333,7 @@ static void skl_pipe_wm_get_hw_state(struct
> drm_crtc *crtc)
> Â
> Â hw->dirty_pipes |= drm_crtc_mask(crtc);
> Â
> - active->linetime = hw->wm_linetime[pipe];
> + active->linetime = I915_READ(PIPE_WM_LINETIME(pipe));
> Â
> Â for (level = 0; level <= max_level; level++) {
> Â for (i = 0; i < intel_num_planes(intel_crtc); i++) {