Re: [PATCH 3/4] drm/sun4i: dotclock: Allow divider = 127

From: Maxime Ripard
Date: Sun Sep 18 2016 - 15:14:03 EST


On Thu, Sep 15, 2016 at 11:14:01PM +0800, Chen-Yu Tsai wrote:
> The dot clock divider is 7 bits wide, and the divider range is 1 ~ 127,
> or 6 ~ 127 if phase offsets are used. The 0 register value also
> represents a divider of 1 or bypass.
>
> Make the end condition of the for loop inclusive of 127 in the
> round_rate callback.
>
> Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx>

Applied, thanks!
Maxime

--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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