Re: [PATCH 2/2] coresight: fix handling of ETM trace register access via sysfs

From: Sudeep Holla
Date: Thu Aug 04 2016 - 12:05:46 EST




On 04/08/16 16:46, Mathieu Poirier wrote:
On 3 August 2016 at 10:12, Sudeep Holla <sudeep.holla@xxxxxxx> wrote:
The ETM registers are classified into 2 categories: trace and management.
The core power domain contains most of the trace unit logic including
all(except TRCOSLAR and TRCOSLSR) the trace registers. The debug power
domain contains the external debugger interface including all management
registers.

This patch adds coresight unit specific function coresight_simple_func
which can be used for ETM trace registers by providing a ETM specific
read function which does smp cross call to ensure the trace core is
powered up before the register is accessed.

Cc: Mathieu Poirier <mathieu.poirier@xxxxxxxxxx>
Signed-off-by: Sudeep Holla <sudeep.holla@xxxxxxx>

Hey Sudeep,

I'm good with this patch - just a few things to amend below.

Many thanks,
Mathieu

---
drivers/hwtracing/coresight/coresight-etb10.c | 2 +-
.../hwtracing/coresight/coresight-etm3x-sysfs.c | 2 +-
.../hwtracing/coresight/coresight-etm4x-sysfs.c | 58 ++++++++++++++++------
drivers/hwtracing/coresight/coresight-etm4x.h | 1 +
drivers/hwtracing/coresight/coresight-priv.h | 9 +++-
drivers/hwtracing/coresight/coresight-stm.c | 2 +-
drivers/hwtracing/coresight/coresight-tmc.c | 2 +-
7 files changed, 54 insertions(+), 22 deletions(-)

Hi Mathieu,

I think the latest release of the firmware(inparticular SCP v1.16.0) for

Is this public? If so please give me the link so that we test with
the same environment.


Yes I believe so. You should be able to grab latest @[1]

I agree with all the other comments, will repost v2 soon.

--
Regards,
Sudeep

[1] https://snapshots.linaro.org/member-builds/armlt-platforms-release/28/juno-uefi.zip