[PATCH] acpi: pci: QDF2432 32 bit config space accessors

From: Christopher Covington
Date: Thu Apr 28 2016 - 17:28:14 EST


Qualcomm Technologies QDF2432 SoCs require 32 bit accessors to be used
for the PCI configuration space. Register the appropriate quirk.

Signed-off-by: Christopher Covington <cov@xxxxxxxxxxxxxx>
---
Depends on Tomasz Nowicki's latest series:
[PATCH V6 00/13] Support for generic ACPI based PCI host controller
---
drivers/acpi/pci_gen_host.c | 13 +++++++++++++
drivers/pci/ecam.c | 10 ++++++++++
drivers/pci/ecam.h | 3 +++
3 files changed, 26 insertions(+)

diff --git a/drivers/acpi/pci_gen_host.c b/drivers/acpi/pci_gen_host.c
index e55dfca..daf8a86 100644
--- a/drivers/acpi/pci_gen_host.c
+++ b/drivers/acpi/pci_gen_host.c
@@ -257,3 +257,16 @@ int raw_pci_write(unsigned int domain, unsigned int busn, unsigned int devfn,
return PCIBIOS_DEVICE_NOT_FOUND;
return bus->ops->write(bus, devfn, reg, len, val);
}
+
+static const struct dmi_system_id qcom_qdf2432[] = {
+ {
+ .ident = "Qualcomm Technologies QDF2432",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "Qualcomm"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "QDF2432"),
+ },
+ },
+ { }
+};
+
+DECLARE_ACPI_MCFG_FIXUP(qcom_qdf2432, NULL, &pci_generic_ecam_32b_ops, PCI_MCFG_DOMAIN_ANY, PCI_MCFG_BUS_ANY);
diff --git a/drivers/pci/ecam.c b/drivers/pci/ecam.c
index ff04c01..720a038 100644
--- a/drivers/pci/ecam.c
+++ b/drivers/pci/ecam.c
@@ -135,3 +135,13 @@ struct pci_generic_ecam_ops pci_generic_ecam_default_ops = {
.write = pci_generic_config_write,
}
};
+
+/* ECAM ops with 32 bit config space access quirk */
+struct pci_generic_ecam_ops pci_generic_ecam_32b_ops = {
+ .bus_shift = 20,
+ .pci_ops = {
+ .map_bus = pci_generic_ecam_map_bus,
+ .read = pci_generic_config_read32,
+ .write = pci_generic_config_write32,
+ }
+};
diff --git a/drivers/pci/ecam.h b/drivers/pci/ecam.h
index 706621a..4af764f 100644
--- a/drivers/pci/ecam.h
+++ b/drivers/pci/ecam.h
@@ -58,6 +58,9 @@ void __iomem *pci_generic_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
/* default ECAM ops, bus shift 20, generic read and write */
extern struct pci_generic_ecam_ops pci_generic_ecam_default_ops;

+/* ECAM ops with 32 bit config space access quirk */
+extern struct pci_generic_ecam_ops pci_generic_ecam_32b_ops;
+
#ifdef CONFIG_PCI_HOST_GENERIC
/* for DT based pci controllers that support ECAM */
int pci_host_common_probe(struct platform_device *pdev,
--
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