Re: [PATCH 3/3] mtd: brcmnand: respect ECC algorithm set by NAND subsystem

From: Boris Brezillon
Date: Mon Apr 25 2016 - 11:05:28 EST


On Fri, 22 Apr 2016 13:23:15 +0200
RafaÅ MiÅecki <zajec5@xxxxxxxxx> wrote:

> It's more reliable than guessing based on ECC strength. It allows using
> NAND on devices with BCH-1 (e.g. D-Link DIR-885L).

Brian, Kamal, could you add your Ack on this patch.

>
> Signed-off-by: RafaÅ MiÅecki <zajec5@xxxxxxxxx>
> ---
> drivers/mtd/nand/brcmnand/brcmnand.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
> index c3331ff..dcb22dc 100644
> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
> @@ -1927,7 +1927,7 @@ static int brcmnand_setup_dev(struct brcmnand_host *host)
>
> switch (chip->ecc.size) {
> case 512:
> - if (chip->ecc.strength == 1) /* Hamming */
> + if (chip->ecc.algo == NAND_ECC_HAMMING)
> cfg->ecc_level = 15;
> else
> cfg->ecc_level = chip->ecc.strength;



--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com