Re: [PATCH v11] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

From: Michal Simek
Date: Thu Dec 10 2015 - 02:02:53 EST


Hi Bjorn,

On 10.12.2015 00:19, Bjorn Helgaas wrote:
> [+cc Michal, Paul, Thierry, Stephen, Alexandre (see irq_dispose_mapping questions below)]
>
> On Sun, Nov 29, 2015 at 05:33:53PM +0530, Bharat Kumar Gogada wrote:
>> Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
>>
>> Signed-off-by: Bharat Kumar Gogada <bharatku@xxxxxxxxxx>
>> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xxxxxxxxxx>
>> Acked-by: Rob Herring <robh@xxxxxxxxxx>
>
> This needs either a MAINTAINERS update or an ack from Michal (whose
> MAINTAINERS entry matches anything containing "xilinx").

We have done it in this way because driver owners are changing time to
time and my entry cover it that I can pass it to appropriate person who
is responsible for it.

For this Maintainers part here is my:
Acked-by: Michal Simek <michal.simek@xxxxxxxxxx>

Thanks,
Michal
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/