Re: [RFC PATCH] x86/cpu: Fix MSR value truncation issue

[Andy Lutomirski]

On Fri, Oct 30, 2015 at 12:32 PM, Borislav Petkov <bp@xxxxxxxxx> wrote:
> On Fri, Oct 30, 2015 at 12:26:42PM -0700, Andy Lutomirski wrote:
>> Want to add that to the patch or make it another patch?
>
> Yeah, I'll make another one as it is going to document why we're
> explicitly ANDing with 0xffffffffull.
>
>> Fair enough.  I suppose that this thing is a handful of separate
>> fields as opposed to being just a number.
>
> You mean MSR_STAR?
>
> Just the two upper 16-bit values. The lower 32-bit are reserved on Intel
> while on AMD they're "32-bit SYSCALL Target EIP", meaning that you can
> use SYSCALL on 32-bit too.

Yeah, exactly.  When I wrote the "make wrmsrl a function" patch, I was
dealing with MSRs that were genuinely 64-bit numbers, except that in
some cases they provably fit in 32 bits, and gcc was unhappy.

--Andy
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