[PATCH 07/11] x86, fpu: rework YMM definition

From: Dave Hansen
Date: Thu Aug 27 2015 - 13:11:20 EST



From: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>

We are about to rework all of the "extended state" definitions.
This makes the 'ymm' naming consistent with the AVX-512 types
we will introduce later.

We also add a convenience type: "reg_128_bit" so that we do
not have to spell out our arithmetic.

Signed-off-by: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>
Cc: Ingo Molnar <mingo@xxxxxxxxxx>
Cc: x86@xxxxxxxxxx
Cc: Borislav Petkov <bp@xxxxxxxxx>
Cc: Fenghua Yu <fenghua.yu@xxxxxxxxx>
Cc: Tim Chen <tim.c.chen@xxxxxxxxxxxxxxx>
Cc: linux-kernel@xxxxxxxxxxxxxxx
---

b/arch/x86/include/asm/fpu/types.h | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)

diff -puN arch/x86/include/asm/fpu/types.h~x86-fpu-rework-ymm-types arch/x86/include/asm/fpu/types.h
--- a/arch/x86/include/asm/fpu/types.h~x86-fpu-rework-ymm-types 2015-08-27 10:08:03.542724062 -0700
+++ b/arch/x86/include/asm/fpu/types.h 2015-08-27 10:08:03.545724199 -0700
@@ -126,17 +126,23 @@ enum xfeature_nr {

#define FIRST_EXTENDED_XFEATURE_NR XFEATURE_NR_YMM

+struct reg_128_bit {
+ u8 regbytes[128/8];
+};
+
/*
+ * State component 2:
+ *
* There are 16x 256-bit AVX registers named YMM0-YMM15.
* The low 128 bits are aliased to the 16 SSE registers (XMM0-XMM15)
- * and are stored in 'struct fxregs_state::xmm_space[]'.
+ * and are stored in 'struct fxregs_state::xmm_space[]' in the
+ * "legacy" area.
*
- * The high 128 bits are stored here:
- * 16x 128 bits == 256 bytes.
+ * The high 128 bits are stored here.
*/
struct ymmh_struct {
- u8 ymmh_space[256];
-};
+ struct reg_128_bit hi_ymm[16];
+} __packed;

/* Intel MPX support: */

_
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