[GIT PULL] clk: changes for 3.20

From: Mike Turquette
Date: Fri Feb 20 2015 - 14:40:43 EST


The following changes since commit e36f014edff70fc02b3d3d79cead1d58f289332e:

Linux 3.19-rc7 (2015-02-01 20:07:21 -0800)

are available in the git repository at:

https://git.linaro.org/people/mike.turquette/linux.git tags/clk-for-linus-3.20

for you to fetch changes up to ec02ace8ca0a50eef430d3676de5c5fa978b0e29:

clk: Only recalculate the rate if needed (2015-02-19 19:29:19 -0800)

----------------------------------------------------------------
The clock framework changes for 3.20 contain the usual driver additions,
enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
devices. Additionaly the framework core underwent a bit of surgery with
two major changes. The boundary between the clock core and clock
providers (e.g clock drivers) is now more well defined with dedicated
provider helper functions. struct clk no longer maps 1:1 with the
hardware clock but is a true per-user cookie which helps us tracker
users of hardware clocks and debug bad behavior. The second major change
is the addition of rate constraints for clocks. Rate ranges are now
supported which are analogous to the voltage ranges in the regulator
framework. Unfortunately these changes to the core created some
breakeage. We think we fixed it all up but for this reason there are
lots of last minute commits trying to undo the damage.

----------------------------------------------------------------
Andrew Bresticker (1):
clk: tegra: SDMMC controllers are on APB

Arnd Bergmann (1):
clk: omap: compile legacy omap3 clocks conditionally

Chanwoo Choi (4):
clk: samsung: Change the return value of samsung_cmu_register_one()
clk: samsung: exynos3250: Use samsung_cmu_register_one() to simplify code
clk: samsung: exynos4415: Use samsung_cmu_register_one() to simplify code
clk: samsung: exynos4: Add divider clock id for memory bus frequency

Chen-Yu Tsai (10):
clk: sunxi: Remove ahb1_sdram from sun6i/sun8i protected clocks list
clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider
ARM: dts: sun6i: Unify ahb1 clock nodes
ARM: dts: sun8i: Unify ahb1 clock nodes
ARM: dts: sun8i: Add PLL6 and MBUS clock nodes
clk: sunxi: Fix factor clocks usage for sun9i core clocks
clk: sunxi: Propagate rate changes to parent for mux clocks
clk: sunxi: Add a common setup function for mmc module clocks
clk: sunxi: Add mod0 and mmc module clock support for A80
clk: sunxi: Add driver for A80 MMC config clocks/resets

Doug Anderson (2):
clk: rockchip: Add CLK_SET_RATE_PARENT to sclk_uart clocks
clk: rockchip: rk3288: Make s2r reliable by switching PLLs to slow mode

Emil Medve (9):
clk: qoriq: Fix checkpatch type PARENTHESIS_ALIGNMENT
clk: qoriq: Fix checkpatch type ALLOC_WITH_MULTIPLY
clk: qoriq: Fix checkpatch type ALLOC_SIZEOF_STRUCT
clk: qoriq: Fix checkpatch type OOM_MESSAGE
clk: qoriq: Make local symbol 'static'
clk: qoriq: Replace kzalloc() with kmalloc()
clk: qoriq: Use pr_fmt()
powerpc/corenet: Enable CLK_QORIQ
clk: qoriq: Add support for the platform PLL

Geert Uytterhoeven (2):
clk: shmobile: div6: Avoid changing divisor in .disable()
clk: shmobile: div6: Avoid division by zero in .round_rate()

Hans de Goede (4):
clk: sunxi: Give sunxi_factors_register a registers parameter
clk: sunxi: Make the mod0 clk driver also a platform driver
clk: sunxi: rewrite sun9i_a80_get_pll4_factors()
sunxi: clk: Set sun6i-pll1 n_start = 1

Heiko Stuebner (3):
clk: rockchip: add id for watchdog pclk on rk3288
Merge branch 'v3.20-clk/new-ids' into v3.20-clk/next
clk: rockchip: add a dummy clock for the watchdog pclk on rk3288

Hisashi Nakamura (1):
clk: shmobile: Add r8a7793 support

Huang Lin (1):
clk: rockchip: add clock IDs for the PVTM clocks

Javier Martinez Canillas (3):
clk: Don't dereference parent clock if is NULL
clk: Add __clk_hw_set_clk helper function
clk: Replace explicit clk assignment with __clk_hw_set_clk

Josh Cartwright (1):
clk: qcom: Add support for regmap divider clocks

Kever Yang (2):
clk: rockchip: add clock ID for usbphy480m_src
clk: rockchip: use the clock ID for usbphy480m_src

Kevin Hao (2):
powerpc: call of_clk_init() from time_init()
clk: ppc-corenet: fix section mismatch warning

Krzysztof Kozlowski (2):
clk: Add clk_unregister_{divider, gate, mux} to close memory leak
clk: exynos-audss: Fix memory leak on driver unbind or probe failure

Mark Zhang (1):
clk: tegra: Define PLLD_DSI and remove dsia(b)_mux

Max Filippov (1):
clk: TI CDCE706 clock synthesizer driver

Maxime Ripard (5):
clk: sunxi: Rework MMC phase clocks
ARM: sunxi: dt: Add sample and output mmc clocks
mmc: sunxi: Convert MMC driver to the standard clock phase API
clk: sunxi: Remove custom phase function
clk: Export phase functions

Michael Turquette (12):
Merge tag 'for-v3.20-exynos7-clk' of git://linuxtv.org/snawrocki/samsung into clk-next
Merge branch 'clk-has-parent' into clk-next
Merge branch 'clk-shmobile-for-3.20' of git://git.kernel.org/.../geert/renesas-drivers into clk-next
Merge tag 'v3.20-rockchip-clk1' of git://git.kernel.org/.../mmind/linux-rockchip into clk-next
Merge tag 'sunxi-clocks-for-3.20' of https://git.kernel.org/.../mripard/linux into clk-next
Merge branch 'clk-omap-legacy' into clk-next
arm: omap2+ remove dead clock code
pci: xgene: do not use clk-private.h
clk: remove clk-private.h
Merge tag 'v3.20-exynos-clk' of git://linuxtv.org/snawrocki/samsung into clk-next
Merge branch 'clk-next' into v3.19-rc7
Merge tag 'tegra-clk-3.20' of git://nv-tegra.nvidia.com/user/pdeschrijver/linux into clk-next

Oleksij Rempel (1):
ARM: clk: add clk-asm9260 driver

Padmavathi Venna (3):
clk: samsung: exynos7: add gate clock for DMA block
clk: samsung: exynos7: add clocks for SPI block
clk: samsung: exynos7: add clocks for audio block

Paul Walmsley (2):
clk: tegra: split Tegra124 clock header file
clk: tegra: Add support for the Tegra132 CAR IP block

Peter De Schrijver (2):
clk: tegra: make tegra_clocks_apply_init_table() arch_initcall
clk: tegra: Update binding doc for Tegra132

Peter Griffin (1):
clk: st: STiH410: Fix pdiv and fdiv divisor when setting rate

Rajendra Nayak (3):
dt-bindings: Add #defines for IPQ806x lpass clock control
clk: qcom: Add IPQ806X LPASS clock controller (LCC) driver
devicetree: bindings: Document qcom,lcc

Robert Jarzmik (1):
clk: pxa: add pxa3xx clock driver

Sean Paul (1):
clk: tegra124: Add init data for dsi lp clocks

Sergei Shtylyov (3):
clk: shmobile: Add R-Car Gen2 RCAN clock support
clk: shmobile: Add R-Car Gen2 ADSP clock support
clk-gate: fix bit # check in clk_register_gate()

Soren Brinkmann (1):
clk: zynq: Force CPU_2X clock to be ungated

Srinivas Kandagatla (1):
clk: Fix debugfs clk removal before inited

Stefan Wahren (2):
clk: mxs: Fix invalid 32-bit access to frac registers
Revert "clk: mxs: Fix invalid 32-bit access to frac registers"

Stephen Boyd (8):
clk: Skip fetching index for single parent clocks
clk: Add __clk_mux_determine_rate_closest
clk: divider: Make generic for usage elsewhere
clk: qcom: Add simple regmap based muxes
clk: qcom: Add MSM8960/APQ8064 LPASS clock controller (LCC) driver
clk: ux500: Drop use of clk-private.h
clk: ti: Drop use of clk-private.h
clkdev: Always allocate a struct clk and call __clk_get() w/ CCF

Tang Yuantian (2):
clock: redefine variable clocks_per_pll as a struct member
clk: ppc-corenet: rename driver to clk-qoriq

Tero Kristo (11):
clk: ti: add core support for initializing legacy clocks
clk: ti: mux: add support for legacy mux init
clk: ti: gate: add support for legacy gate init
clk: ti: interface: add support for legacy interface clock init
clk: ti: divider: add support for legacy divider init
clk: ti: dpll: add support for legacy DPLL init
clk: ti: composite: add support for legacy composite clock init
clk: ti: add omap3 legacy clock data
ARM: OMAP3: PRM: add support for legacy iomapping init
ARM: OMAP3: use clock data from TI clock driver for legacy boot
ARM: OMAP3: remove legacy clock data

Thierry Reding (1):
clk: Introduce clk_has_parent()

Tomeu Vizoso (8):
clk: Remove unneeded NULL checks
clk: Remove __clk_register
clk: tegra: Fix order of arguments in WARN
clk: Make clk API return per-user struct clk instances
clk: Add rate constraints to clocks
clkdev: Export clk_register_clkdev
MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr
clk: Only recalculate the rate if needed

Tony K Nadackal (1):
clk: samsung: exynos7: Add clocks for MSCL block

Tony Lindgren (2):
clk: ti: Add support for FAPLL on dm816x
clk: ti: Initialize clocks for dm816x

Ulrich Hecht (2):
clk: shmobile: r8a73a4 common clock framework implementation
clk: shmobile: Add r8a73a4 SoC to MSTP bindings

Vivek Gautam (1):
clk: samsung: exynos7: Add required clock tree for USB

Yoshihiro Kaneko (1):
clk: shmobile: r8a7793: document CPG clock support

huang lin (1):
clk: rockchip: add PVTM clocks on rk3288

Documentation/clk.txt | 2 +
.../devicetree/bindings/clock/exynos7-clock.txt | 15 +
.../bindings/clock/nvidia,tegra124-car.txt | 10 +-
.../devicetree/bindings/clock/qcom,lcc.txt | 21 +
.../devicetree/bindings/clock/qoriq-clock.txt | 5 +-
.../bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
.../bindings/clock/renesas,r8a73a4-cpg-clocks.txt | 33 +
.../clock/renesas,rcar-gen2-cpg-clocks.txt | 12 +-
Documentation/devicetree/bindings/clock/sunxi.txt | 43 +-
.../devicetree/bindings/clock/ti,cdce706.txt | 42 +
.../devicetree/bindings/clock/ti/fapll.txt | 33 +
.../devicetree/bindings/mmc/sunxi-mmc.txt | 8 +-
MAINTAINERS | 5 +
arch/arm/boot/dts/sun4i-a10.dtsi | 72 +-
arch/arm/boot/dts/sun5i-a10s.dtsi | 54 +-
arch/arm/boot/dts/sun5i-a13.dtsi | 44 +-
arch/arm/boot/dts/sun6i-a31.dtsi | 86 +-
arch/arm/boot/dts/sun7i-a20.dtsi | 72 +-
arch/arm/boot/dts/sun8i-a23.dtsi | 96 +-
arch/arm/mach-omap2/Makefile | 2 +-
arch/arm/mach-omap2/cclock3xxx_data.c | 3692 ----------------
arch/arm/mach-omap2/clock.c | 16 -
arch/arm/mach-omap2/clock.h | 14 +-
arch/arm/mach-omap2/clock_common_data.c | 11 -
arch/arm/mach-omap2/dpll3xxx.c | 13 +-
arch/arm/mach-omap2/dpll44xx.c | 2 +
arch/arm/mach-omap2/io.c | 28 +-
arch/arm/mach-omap2/prm.h | 1 +
arch/arm/mach-omap2/prm_common.c | 11 +
arch/arm/mach-tegra/tegra.c | 2 -
arch/mips/alchemy/common/clock.c | 6 +
arch/powerpc/configs/corenet32_smp_defconfig | 1 +
arch/powerpc/configs/corenet64_smp_defconfig | 1 +
arch/powerpc/kernel/time.c | 5 +
arch/powerpc/platforms/512x/clock-commonclk.c | 11 +-
drivers/clk/Kconfig | 18 +-
drivers/clk/Makefile | 4 +-
drivers/clk/at91/clk-programmable.c | 2 +
drivers/clk/bcm/clk-kona.c | 2 +
drivers/clk/clk-asm9260.c | 348 ++
drivers/clk/clk-cdce706.c | 700 +++
drivers/clk/clk-composite.c | 29 +-
drivers/clk/clk-divider.c | 228 +-
drivers/clk/clk-gate.c | 18 +-
drivers/clk/clk-mux.c | 16 +
drivers/clk/{clk-ppc-corenet.c => clk-qoriq.c} | 178 +-
drivers/clk/clk.c | 1009 +++--
drivers/clk/clk.h | 24 +-
drivers/clk/clkdev.c | 110 +-
drivers/clk/hisilicon/clk-hi3620.c | 2 +
drivers/clk/mmp/clk-mix.c | 2 +
drivers/clk/pxa/Makefile | 1 +
drivers/clk/pxa/clk-pxa.c | 2 +-
drivers/clk/pxa/clk-pxa3xx.c | 364 ++
drivers/clk/qcom/Kconfig | 18 +
drivers/clk/qcom/Makefile | 4 +
drivers/clk/qcom/clk-pll.c | 1 +
drivers/clk/qcom/clk-rcg.c | 10 +-
drivers/clk/qcom/clk-rcg2.c | 6 +
drivers/clk/qcom/clk-regmap-divider.c | 70 +
drivers/clk/qcom/clk-regmap-divider.h | 29 +
drivers/clk/qcom/clk-regmap-mux.c | 59 +
drivers/clk/qcom/clk-regmap-mux.h | 29 +
drivers/clk/qcom/gcc-ipq806x.c | 12 +
drivers/clk/qcom/lcc-ipq806x.c | 473 ++
drivers/clk/qcom/lcc-msm8960.c | 585 +++
drivers/clk/rockchip/clk-rk3288.c | 48 +-
drivers/clk/samsung/clk-exynos-audss.c | 32 +-
drivers/clk/samsung/clk-exynos3250.c | 217 +-
drivers/clk/samsung/clk-exynos4.c | 10 +-
drivers/clk/samsung/clk-exynos4415.c | 216 +-
drivers/clk/samsung/clk-exynos7.c | 408 +-
drivers/clk/samsung/clk.c | 13 +-
drivers/clk/samsung/clk.h | 3 +-
drivers/clk/shmobile/Makefile | 2 +
drivers/clk/shmobile/clk-div6.c | 18 +-
drivers/clk/shmobile/clk-r8a73a4.c | 241 +
drivers/clk/shmobile/clk-rcar-gen2.c | 88 +
drivers/clk/st/clk-flexgen.c | 39 +-
drivers/clk/st/clkgen-mux.c | 14 +-
drivers/clk/sunxi/Makefile | 1 +
drivers/clk/sunxi/clk-factors.c | 12 +-
drivers/clk/sunxi/clk-factors.h | 7 +-
drivers/clk/sunxi/clk-mod0.c | 224 +-
drivers/clk/sunxi/clk-sun6i-ar100.c | 2 +
drivers/clk/sunxi/clk-sun8i-mbus.c | 13 +-
drivers/clk/sunxi/clk-sun9i-core.c | 119 +-
drivers/clk/sunxi/clk-sun9i-mmc.c | 219 +
drivers/clk/sunxi/clk-sunxi.c | 262 +-
drivers/clk/tegra/Makefile | 1 +
drivers/clk/tegra/clk-id.h | 2 -
drivers/clk/tegra/clk-periph.c | 14 +-
drivers/clk/tegra/clk-pll.c | 18 +-
drivers/clk/tegra/clk-tegra-periph.c | 18 +-
drivers/clk/tegra/clk-tegra114.c | 10 +-
drivers/clk/tegra/clk-tegra124.c | 168 +-
drivers/clk/tegra/clk.c | 7 +-
drivers/clk/ti/Makefile | 8 +-
drivers/clk/ti/clk-3xxx-legacy.c | 4653 ++++++++++++++++++++
drivers/clk/ti/clk-3xxx.c | 8 +-
drivers/clk/ti/clk-44xx.c | 2 +-
drivers/clk/ti/clk-54xx.c | 2 +-
drivers/clk/ti/clk-7xx.c | 2 +-
drivers/clk/ti/clk-816x.c | 53 +
drivers/clk/ti/clk.c | 127 +
drivers/clk/ti/clock.h | 172 +
drivers/clk/ti/composite.c | 48 +-
drivers/clk/ti/divider.c | 132 +-
drivers/clk/ti/dpll.c | 121 +-
drivers/clk/ti/fapll.c | 410 ++
drivers/clk/ti/gate.c | 163 +-
drivers/clk/ti/interface.c | 98 +-
drivers/clk/ti/mux.c | 70 +-
drivers/clk/ux500/clk-prcc.c | 1 -
drivers/clk/ux500/clk-prcmu.c | 1 -
drivers/clk/zynq/clkc.c | 1 +
drivers/cpufreq/Kconfig.powerpc | 2 +-
drivers/mmc/host/sunxi-mmc.c | 73 +-
drivers/pci/host/pci-xgene.c | 2 +-
include/dt-bindings/clock/alphascale,asm9260.h | 97 +
include/dt-bindings/clock/exynos4.h | 7 +-
include/dt-bindings/clock/exynos7-clk.h | 88 +-
include/dt-bindings/clock/qcom,gcc-ipq806x.h | 1 -
include/dt-bindings/clock/qcom,lcc-ipq806x.h | 30 +
include/dt-bindings/clock/qcom,lcc-msm8960.h | 50 +
include/dt-bindings/clock/rk3288-cru.h | 4 +
include/dt-bindings/clock/tegra124-car-common.h | 345 ++
include/dt-bindings/clock/tegra124-car.h | 345 +-
include/linux/clk-private.h | 220 -
include/linux/clk-provider.h | 58 +-
include/linux/clk.h | 45 +
include/linux/clk/sunxi.h | 22 -
include/linux/clk/tegra.h | 2 -
include/linux/clk/ti.h | 25 +
134 files changed, 13045 insertions(+), 5712 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,lcc.txt
create mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a73a4-cpg-clocks.txt
create mode 100644 Documentation/devicetree/bindings/clock/ti,cdce706.txt
create mode 100644 Documentation/devicetree/bindings/clock/ti/fapll.txt
delete mode 100644 arch/arm/mach-omap2/cclock3xxx_data.c
create mode 100644 drivers/clk/clk-asm9260.c
create mode 100644 drivers/clk/clk-cdce706.c
rename drivers/clk/{clk-ppc-corenet.c => clk-qoriq.c} (59%)
create mode 100644 drivers/clk/pxa/clk-pxa3xx.c
create mode 100644 drivers/clk/qcom/clk-regmap-divider.c
create mode 100644 drivers/clk/qcom/clk-regmap-divider.h
create mode 100644 drivers/clk/qcom/clk-regmap-mux.c
create mode 100644 drivers/clk/qcom/clk-regmap-mux.h
create mode 100644 drivers/clk/qcom/lcc-ipq806x.c
create mode 100644 drivers/clk/qcom/lcc-msm8960.c
create mode 100644 drivers/clk/shmobile/clk-r8a73a4.c
create mode 100644 drivers/clk/sunxi/clk-sun9i-mmc.c
create mode 100644 drivers/clk/ti/clk-3xxx-legacy.c
create mode 100644 drivers/clk/ti/clk-816x.c
create mode 100644 drivers/clk/ti/clock.h
create mode 100644 drivers/clk/ti/fapll.c
create mode 100644 include/dt-bindings/clock/alphascale,asm9260.h
create mode 100644 include/dt-bindings/clock/qcom,lcc-ipq806x.h
create mode 100644 include/dt-bindings/clock/qcom,lcc-msm8960.h
create mode 100644 include/dt-bindings/clock/tegra124-car-common.h
delete mode 100644 include/linux/clk-private.h
delete mode 100644 include/linux/clk/sunxi.h
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