Re: [PATCH v2] intel_idle: Fixed C6 state on Avoton/Rangeleyprocessors
From: Bockholdt Arne
Date: Wed Nov 27 2013 - 02:49:15 EST
On Tue, 2013-11-26 at 13:43 -0500, Len Brown wrote:
> > .desc = "MWAIT 0x51",
> > - .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
> > + .flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
> > .exit_latency = 15,
> > .target_residency = 45,
>
> Thanks for noticing that .desc and .flags are inconsistent.
> This is my fault -- apparently I e-mailed a version of this patch that
> is older than what I have in my git tree.
>
> No big issue, though, as 0x51 and 0x58 do exactly the same thing in
> AVN hardware.
> Indeed, changing .desc to 0x58 would be fine also.
The Rangeley on my Supermicro A1SRi-2758F board won't enter C6 with
MWAIT flag set to 0x58 but will do that with 0x51. Maybe the missing
turbo mode of the Rangeley ?
Arne
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