Re: [PATCH v2] RFC: interrupt consistency check for OF GPIO IRQs

From: Linus Walleij
Date: Wed Aug 21 2013 - 19:00:22 EST


On Wed, Aug 21, 2013 at 3:21 PM, Lars Poeschel <poeschel@xxxxxxxxxxx> wrote:
> On Monday 19 August 2013 at 21:35:22, Stephen Warren wrote:
>> On 08/17/2013 03:59 AM, Tomasz Figa wrote:

>> > Then two _example_ formats follow, preceded by following statement:
>> > The following two variants are commonly used:
>> > I already know a variant which uses three (Exynos combiner) and four
>> > (S3C24xx interrupt controller) cells. They are not pin controllers,
>> > but you can't stop anyone from adopting similar or even more complex
>> > specifiers formats for their hardware, especially when it matches
>> > more closely the interrupt/pin layout used in their hardware.
>>
>> Yes, the binding doc interrupts.txt mentioned above does not specify
>> *the* one-/two-cell format, but *a* common/possible one- and two-cell
>> format. There's no strict reason that all interrupt controllers have to
>> use those exact formats. The only way to parse interrupt specifiers is
>> to ask the driver for the the interrupt controller code to parse the
>> property.
>
> I agree with you. I also understand the interrupts.txt binding doc as it
> lists only a common/possible cell format, but it's purpose is not to
> restrict it to this.
>
> I send an updated patch, that uses the drivers xlate function to parse the
> interrupt property in a few minutes.

Thanks that you take this on a spin, I've been busy...

(I also agree with the other comments here, let's see if we can
figure this out!)

Yours,
Linus Walleij
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