Re: [PATCH 04/13] perf_events: sync branch stack sampling with X86precise_sampling (v3)

[Anshuman Khandual]

On Monday 09 January 2012 10:19 PM, Stephane Eranian wrote:
> If precise sampling is enabled on Intel X86, then perf_event uses PEBS.
> To correct for the off-by-one error of PEBS, perf_event uses LBR when
> precise_sample > 1.
> 
> On Intel X86 PERF_SAMPLE_BRANCH_STACK is implemented using LBR,
> therefore both features must be coordinated as they may not
> configure LBR the same way.
> 
> For PEBS, LBR needs to capture all branches at all priv levels.
> This patch sets this up.
> 
> The configuration of PERF_SAMPLE_BRANCH_STACK may not be compatible
> in which case an error must be returned.
> 
> Signed-off-by: Stephane Eranian <eranian@xxxxxxxxxx>
  Reviewed   by: Anshuman Khandual<khandual@xxxxxxxxxxxxxxxxxx>
> ---
>  arch/x86/kernel/cpu/perf_event.c |   22 ++++++++++++++++++++++
>  1 files changed, 22 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
> index 3779313..710ec93 100644
> --- a/arch/x86/kernel/cpu/perf_event.c
> +++ b/arch/x86/kernel/cpu/perf_event.c
> @@ -356,6 +356,7 @@ int x86_setup_perfctr(struct perf_event *event)
>  int x86_pmu_hw_config(struct perf_event *event)
>  {
>  	if (event->attr.precise_ip) {
> +		u64 *br_type, br_sel;
>  		int precise = 0;
> 
>  		/* Support for constant skid */
> @@ -369,6 +370,27 @@ int x86_pmu_hw_config(struct perf_event *event)
> 
>  		if (event->attr.precise_ip > precise)
>  			return -EOPNOTSUPP;
> +		/*
> +		 * check that PEBS LBR correction does not conflict with
> +		 * whatever the user is asking with attr->branch_sample_type
> +		 */
> +		if (event->attr.precise_ip > 1) {
> +
> +			br_type = &event->attr.branch_sample_type;
> +
> +			if (has_branch_stack(event)) {
> +				br_sel = *br_type & PERF_SAMPLE_BRANCH_ANY;
> +				if (br_sel != PERF_SAMPLE_BRANCH_ANY)
> +					return -EOPNOTSUPP;
> +			} else {
> +				/*
> +				 * For PEBS fixups, we capture all
> +				 * the branches at all priv levels
> +				 */
> +				*br_type = PERF_SAMPLE_BRANCH_ANY
> +					 | PERF_SAMPLE_BRANCH_PLM_ALL;
> +			}
> +		}
>  	}
> 
>  	/*


-- 
Linux Technology Centre
IBM Systems and Technology Group
Bangalore India

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