Re: [8259A] Why the irq_desc->handle_irq are set ashandle_level_irq() while the ICW1 is set 0x11, which indicates edge mode?

[Zhihua Che]

2012/1/10 Zhihua Che <zhihua.che@xxxxxxxxx>:
> hi, everyone
>
>      I'm reading kernel codes of version 3.1x and now focusing on
> interrupt subsystem. I find an interesting thing.
>      In x86 architecture, init_8259A() is invoked by init_ISA_irqs()
> to initialize the chip and precisely, the ICW1 of both master and
> slave 8259A chip are set as 0x11 which indicates that the both chip
> are enabled with edge trigger mode. However, I'm wondering why the
> irq_desc->handle_irq fields of the total 16 IRQ descriptor are set as
> handle_level_irq() in init_ISA_irqs(). As far as I know, the
> handle_level_irq() is designed to handle level-mode interrupts.
>      Please Let me know if I miss anything.
>
> Harvey

Precisely,

init_8259A()(int auto_eoi)
{
        *
        *
        *
        outb_pic(0x11, PIC_MASTER_CMD); /* bit3 of ICW1 indicates
trigger mode, here enable edge mode */
        *
        *
}

void init_ISA_irqs(void)
{
        *
        *
        *
        for (i = 0; i < legacy_pic->nr_legacy_irqs; i++)
                 irq_set_chip_and_handler_name(i, chip,
handle_level_irq, name); /* here, handle_level_irq() is intended to
handle edge trigger interrupts */
}

Is this ok?
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