Re: [PATCH v4 0/4] perf, x86: Implement AMD IBS

[Robert Richter]

Ingo,

On 15.12.11 17:56:35, Robert Richter wrote:
> Changes for V4 (only patch #3 modified):
> 
>     * removed userland implementation from patch set, will post it as
>       separate patch series
>     * fix returned number of handled nmis in perf_ibs_handle_irq()

> Robert Richter (4):
>   perf, x86: Implement IBS event configuration
>   perf, x86: Implement IBS interrupt handler
>   perf, x86: Implement IBS pmu control ops
>   perf, x86: Implement 64 bit counter support for IBS
> 
>  arch/x86/include/asm/msr-index.h         |    5 +
>  arch/x86/include/asm/perf_event.h        |    2 +
>  arch/x86/kernel/cpu/perf_event_amd_ibs.c |  438 +++++++++++++++++++++++++++++-
>  3 files changed, 438 insertions(+), 7 deletions(-)

Assuming that there is agreement about the perf tool ibs
implementation, could you consider to apply the (kernel) patches? Not
sure what Arnaldo's plan is for the userland. It would be great to
have both ready for 3.3.

(Even if Peter is on vacation or so, except the fix in
perf_ibs_handle_irq() the kernel patches are unchanged and Peter
already agreed to apply them.)

Thanks,

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center

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