Re: [PATCH 05/12] perf_events: add LBR mappings forPERF_SAMPLE_BRANCH filters (v2)

[Stephane Eranian]

On Mon, Dec 5, 2011 at 2:35 PM, Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
> On Fri, 2011-10-14 at 14:37 +0200, Stephane Eranian wrote:
>> Âvoid intel_pmu_lbr_init_atom(void)
>> Â{
>> + Â Â Â /*
>> + Â Â Â Â* only models starting at stepping 10 seems
>> + Â Â Â Â* to have an operational LBR which can freeze
>> + Â Â Â Â* on PMU interrupt
>> + Â Â Â Â*/
>> + Â Â Â if (boot_cpu_data.x86_mask < 10) {
>> + Â Â Â Â Â Â Â pr_cont("LBR disabled due to erratum");
>> + Â Â Â Â Â Â Â return;
>> + Â Â Â }
>
> Shouldn't that be a separate patch?

I'll make it into a separate patch.
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