On 12/03/2011 10:31 PM, shuo.liu@xxxxxxxxxxxxx wrote:This patch has been ported to uboot now, I think we can make a special uboot image for badFrom: Liu Shuo<shuo.liu@xxxxxxxxxxxxx>What is the plan for bad block marker migration?
Freescale FCM controller has a 2K size limitation of buffer RAM. In order
to support the Nand flash chip whose page size is larger than 2K bytes,
we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save
them to a large buffer.
Signed-off-by: Liu Shuo<shuo.liu@xxxxxxxxxxxxx>
---
v3:
-remove page_size of struct fsl_elbc_mtd.
-do a oob write by NAND_CMD_RNDIN.
drivers/mtd/nand/fsl_elbc_nand.c | 243 ++++++++++++++++++++++++++++++++++----
1 files changed, 218 insertions(+), 25 deletions(-)
@@ -473,13 +568,72 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,We need to limit ourselves to the regions that have actually been
* write so the HW generates the ECC.
*/
if (elbc_fcm_ctrl->oob || elbc_fcm_ctrl->column != 0 ||
- elbc_fcm_ctrl->index != mtd->writesize + mtd->oobsize)
- out_be32(&lbc->fbcr,
- elbc_fcm_ctrl->index - elbc_fcm_ctrl->column);
- else
+ elbc_fcm_ctrl->index != mtd->writesize + mtd->oobsize) {
+ if (elbc_fcm_ctrl->oob&& mtd->writesize> 2048) {
+ out_be32(&lbc->fbcr, 64);
+ } else {
+ out_be32(&lbc->fbcr, elbc_fcm_ctrl->index
+ - elbc_fcm_ctrl->column);
+ }
written to in the buffer. fbcr needs to be set separately for first and
last subpages, with intermediate subpages having 0, 64, or 2112 as
appropriate. Subpages that are entirely before column or entirely after
column + index should be skipped.
Ok.+ } else {Please explicitly show the (FIR_OP_NOP<< FIR_OP0_SHIFT) compenent.
+ out_be32(&lbc->fir, FIR_OP_WB<< FIR_OP1_SHIFT);
+ for (i = 1; i< n; i++) {
+ if (i == n - 1) {
+ elbc_fcm_ctrl->use_mdr = 1;
+ out_be32(&lbc->fir,
+ (FIR_OP_WB<< FIR_OP1_SHIFT) |
+ (FIR_OP_CM3<< FIR_OP2_SHIFT) |
+ (FIR_OP_CW1<< FIR_OP3_SHIFT) |
+ (FIR_OP_RS<< FIR_OP4_SHIFT));
+ } else if (mtd->writesize>= 2048&& mtd->writesize<= 16 * 1024) {Don't insert a blank line here.
+
setbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS);
-Scott